參數(shù)資料
型號: STM32F103T6U6AXX
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 72 MHz, RISC MICROCONTROLLER, PQCC36
封裝: 6 X 6 MM, 0.50 MM PITCH, ROHS COMPLIANT, VFQFPN-36
文件頁數(shù): 61/83頁
文件大?。?/td> 998K
代理商: STM32F103T6U6AXX
Electrical characteristics
STM32F103x6, STM32F103x8, STM32F103xB
Equation 1: RAIN max formula:
The formula above (Equation 1) is used to determine the maximum external impedance allowed for an
error below 1/4 of LSB. Here N = 12 (from 12-bit resolution).
Table 46.
RAIN max for fADC = 14 MHz
(1)
1.
Data guaranteed by design, not tested in production.
Ts (cycles)
tS (s)
RAIN max (kΩ)
1.5
0.11
1.2
7.5
0.54
10
13.5
0.96
19
28.5
2.04
41
41.5
2.96
60
55.5
3.96
80
71.5
5.11
104
239.5
17.1
350
Table 47.
ADC accuracy - limited test conditions(1)
1.
ADC DC accuracy values are measured after internal calibration.
Symbol
Parameter
Test conditions
Typ
Max(2)
2.
Data based on characterization, not tested in production.
Unit
ET
Total unadjusted error(3)
3.
ADC Accuracy vs. Negative Injection Current: Injecting negative current on any of the standard (non-
robust) analog input pins should be avoided as this significantly reduces the accuracy of the conversion
being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to
standard analog pins which may potentially inject negative current.
Any positive injection current within the limits specified for IINJ(PIN) and ΣIINJ(PIN) in Section 5.3.12 does not
affect the ADC accuracy.
fPCLK2 = 56 MHz,
fADC = 14 MHz, RAIN < 10 kΩ,
VDDA = 3 V to 3.6 V
TA = 25 °C
Measurements made after
ADC calibration
VREF+ = VDDA
±1.3
±2
LSB
EO
Offset error(3)
±1
±1.5
EG
Gain error(3)
±0.5
±1.5
ED
Differential linearity error(3)
±0.7
±1
EL
Integral linearity error(3)
±0.8
±1.5
R
AIN
T
S
f
ADC
C
ADC
2
N2
+
()
ln
×
----------------------------------------------------------------
R
ADC
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