參數(shù)資料
型號： STM32F103RB
廠商： 意法半導(dǎo)體
英文描述： Performance Line, ARM-based 32-bit MCU with Flash, USB, CAN,Seven 16-bit Timers, Two ADCs and Nine Communication interfaces(增強(qiáng)型，基于ARM內(nèi)核的32位 MCU，帶有Flash，USB，CAN，7個16位計時器，兩個ADC，兩個DAC和9個通信接口)
中文描述： 績效線，基于ARM的閃存，USB，加拿大，7 16 32位MCU位計時器，兩個ADC和9個通信接口（增強(qiáng)型，基于ARM的內(nèi)核的32位微控制器，帶有閃存，USB，加拿大，7個16位計時器，兩個模數(shù)轉(zhuǎn)換器，兩個DAC的和9個通信接口）
文件頁數(shù)： 55/79頁
文件大?。?/td> 1124K
代理商： STM32F103RB
STM32F103xx
Electrical characteristics
SPI interface characteristics
Unless otherwise specified, the parameters given in Table 40 are derived from tests
performed under ambient temperature, fPCLKx frequency and VDD supply voltage conditions
summarized in Table 7.
Refer to Section 5.3.12: I/O port characteristics for more details on the input/output alternate
function characteristics (NSS, SCK, MOSI, MISO).
Table 40.
SPI characteristics(1)
1.
TBD = to be determined.
Symbol
Parameter
Conditions
Min
Max
Unit
fSCK
1/tc(SCK)
SPI clock frequency
Master mode
TBD
MHz
Slave mode
0
TBD
tr(SCK)
tf(SCK)
SPI clock rise and fall
time
Capacitive load: C=50 pF
TBD
ns
tsu(NSS)
(2)
2.
Values based on design simulation and/or characterization results, and not tested in production.
NSS setup time
Slave mode
0
th(NSS)
NSS hold time
Slave mode
0
tw(SCKL)
SCK high and low
time
Master mode, fPCLK= TBD,
presc = TBD
TBD
tsu(MI)
tsu(SI)
Data input setup time
Master mode
TBD
Slave mode
TBD
th(MI)
th(SI)
Data input hold time
Master mode
TBD
Slave mode
TBD
Master mode, fPCLK= TBD
TBD(3)
3.
Depends on fPCLK. For example, if fPCLK= 8MHz, then tPCLK = 1/fPLCLK =125 ns and tv(MO) = 255 ns.
Slave mode, fPCLK= TBD
ta(SO)
4.
Min time is for the minimum time to drive the output and the max time is for the maximum time to validate
the data.
Data output access
time
Slave mode
TBD
Slave mode, fPCLK= TBD
TBD
tdis(SO)
5.
Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put
the data in Hi-Z
Data output disable
time
Slave mode
TBD
tv(SO)
Data output valid time
Slave mode (after enable edge)
TBD
fPCLK= TBD
TBD
Data output valid time
Master mode (after enable
edge)
TBD
fPCLK= TBD
TBD
th(SO)
Data output hold time
Slave mode (after enable edge)
TBD
Master mode (after enable
edge)
TBD
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
STM32F103RBH6 功能描述:ARM微控制器 - MCU 32BIT Cortex M3 M3 72MHz 64pins RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
STM32F103RBH6TR 制造商:STMicroelectronics 功能描述:16/32-BITS MICROS - Tape and Reel
STM32F103RBH6XXX 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces
STM32F103RBH7 功能描述:ARM微控制器 - MCU 32-Bit ARM Cortex 128kb Performance RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
STM32F103RBH7TR 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces
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