參數(shù)資料
型號(hào)： STA003
英文描述： MPEG 2.5 LAYER III AUDIO DECODER
中文描述： 2.5第三層的MPEG音頻解碼器
文件頁(yè)數(shù)： 20/32頁(yè)
文件大?。?/td> 299K
代理商： STA003
PCMCONF
Address: 0x55
Type: R/W
Software Reset: 0x21
Hardware Reset: 0x21
MSB
b7
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
LSB
b0
b6
b5
DIF
b4
INV
b3
FOR
b2
SCL
b1
Description
ORD
1
0
PREC [1] PREC ([0]
PCM order the LS bit is transmitted First
PCM order the MS bit is transmitted First
The word is right padded
The word is left padded
LRCKT Polarity compliant to I2S format
LRCKT Polarity inverted
I2S format
Different formats
Data are sent on the rising edge of SCKT
Data are sent on the falling edge of SCKT
16 bit mode (32 slots transmitted per LRCKT period)
18 bit mode (64 slots transmitted per LRCKT period)
20 bit mode (64 slots transmitted per LRCKT period)
24 bit mode (64 slots transmitted per LRCKT period)
rising edge of SCKT and sampled on the falling. If
set to ’0’ , the data are sent on the falling edge
and sampled on the rising. This last option is the
most commonly used by the commercial DACs.
The default configuration for this flag is ’0’.
Figure 13.
SCKT Polarity Selection
0
1
1
0
0
1
1
0
0
0
1
1
0
1
0
1
PCMCONF is used to set the PCM Output Inter-
face configuration:
ORD: PCM order. If this bit is set to’1’, the LS Bit
is transmitted first, otherwise MS Bit is transmiited
first.
DIF: PCM_DIFF. It is used to select the position
of the valid data into the transmitted word. This
setting is significant only in 18/20/24 bit/word
mode.If it is set to ’0’ the word is right-padded,
otherwise it is left-padded.
INV (fig.12): It is used to select the LRCKT clock
polarity. If it is set to ’1’ the polarity is compliant to
I2S format (low -> left , high -> right), otherwise
the LRCKT is inverted. The default value is ’0’. (if
I2S have to be selected, must be set to ’1’ in the
STA003T configuration phase).
Figure 12.
LRCKT Polarity Selection
FOR: FORMAT is used to select the PCM Output
Interface format.
After hw and sw reset the value is set to 0 corre-
sponding to I2S format.
SCL (fig.13): used to select the Transmitter Serial
Clock polarity. If set to ’1’ the data are sent on the
PREC [1:0]: PCM PRECISION
It is used to select the PCM samples precision, as
follows:
’00’: 16 bit (16 slots transmitted per LCKT period)
’01’: 18 bit (32 slots transmitted per LCKT period)
’10’: 20 bit (32 slots transmitted per LCKT period)
’11’: 24 bit (32 slots transmitted per LCKT period)
The PCM samples precision in STA003T can be
16 or 18-20-24 bits.
When STA003T operates with a 16 (18-20-24)
bits precision, the number of bits transmitted dur-
ing a LRCKT period is 32 (64).
LRCKT
LRCKT
INV_LRCLK=0
left
left
right
right
left
left
INV_LRCLK=1
INV_SCLK=0
SCKT
SDO
INV_SCLK=1
SCKT
SDO
STA003T
20/32
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
STA003T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:MPEG 2.5 LAYER III AUDIO DECODER
STA011 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:L-band RF front-end for digital radio
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STA013 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:MPEG 2.5 LAYER III AUDIO DECODER
STA013 功能描述:音頻 DSP MPEG Audio Decoder RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
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