參數(shù)資料
型號(hào): ST7LITE19F1M6
英文描述: ST7LITE1 - 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY.DATA EEPROM. ADC. 4 TIMERS. SPI
中文描述: ST7LITE1 - 8單電壓閃存EEPROM的MEMORY.DATA位MCU。 ADC的。 4定時(shí)器。的SPI
文件頁數(shù): 30/122頁
文件大小: 1716K
代理商: ST7LITE19F1M6
ST7LITE0, ST7SUPERLITE
30/122
1
SYSTEM INTEGRITY MANAGEMENT
(Cont’d)
7.5.2 Auxiliary
Voltage Detector (AVD)
The Voltage Detector function (AVD) is based on
an analog comparison between a V
IT-(AVD)
and
V
IT+(AVD)
reference value and the V
DD
main sup-
ply voltage (V
AVD
). The V
IT-(AVD)
reference value
for falling voltage is lower than the V
IT+(AVD)
refer-
ence value for rising voltage in order to avoid par-
asitic detection (hysteresis).
The output of the AVD comparator is directly read-
able by the application software through a real
time status bit (AVDF) in the SICSR register. This
bit is read only.
Caution
: The AVD functions only if the LVD is en-
abled through the option byte.
7.5.2.1 Monitoring the V
DD
Main Supply
The AVD voltage threshold value is relative to the
selected LVD threshold configured by option byte
(see
section 15.1 on page 109
).
If the AVD interrupt is enabled, an interrupt is gen-
erated when the voltage crosses the V
IT+(LVD)
or
V
IT-(AVD)
threshold (AVDF bit is set).
In the case of a drop in voltage, the AVD interrupt
acts as an early warning, allowing software to shut
down safely before the LVD resets the microcon-
troller. See
Figure 19
.
The interrupt on the rising edge is used to inform
the application that the V
DD
warning state is over
Figure 19. Using the AVD to Monitor V
DD
V
DD
V
IT+(AVD)
V
IT-(AVD)
V
IT+(LVD)
AVDF bit
0
1
RESET
IF AVDIE bit = 1
V
hyst
AVD INTERRUPT
REQUEST
INTERRUPT Cleared by
hardware
V
IT-(LVD)
LVD RESET
Early Warning Interrupt
(Power has dropped, MCU not
not yet in reset)
0
1
INTERRUPT Cleared by
reset
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