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參數(shù)資料
| 型號： | ST7LITE10F1M6 |
| 英文描述： | FUSE PULLER/TESTERFUSE PULLER/TESTER; Depth, external:15mm; Length:60mm; Voltage rating, AC:24V; Voltage rating, DC:24V; Width, external:20mm |
| 中文描述： | ST7LITE1 - 8單電壓閃存EEPROM的MEMORY.DATA位MCU。 ADC的。 4定時(shí)器。的SPI |
| 文件頁數(shù)： | 28/122頁 |
| 文件大?。?/td> | 1716K |
| 代理商： | ST7LITE10F1M6 |
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ST7LITE0, ST7SUPERLITE
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1
7.5 SYSTEM INTEGRITY MANAGEMENT (SI)
The System Integrity Management block contains
the Low voltage Detector (LVD) and Auxiliary Volt-
age Detector (AVD) functions. It is managed by
the SICSR register.
7.5.1 Low Voltage Detector (LVD)
The Low Voltage Detector function (LVD) gener-
ates a static reset when the V
DD
supply voltage is
below a V
IT-(LVD)
reference value. This means that
it secures the power-up as well as the power-down
keeping the ST7 in reset.
The V
IT-(LVD)
reference value for a voltage drop is
lower than the V
IT+(LVD)
reference value for power-
on in order to avoid a parasitic reset when the
MCU starts running and sinks current on the sup-
ply (hysteresis).
The LVD Reset circuitry generates a reset when
V
DD
is below:
– V
IT+(LVD)
when V
DD
is rising
– V
IT-(LVD)
when V
DD
is falling
The LVD function is illustrated in
Figure 17
.
The voltage threshold can be configured by option
byte to be low, medium or high. See
section 15.1
on page 109
.
Provided the minimum V
DD
value (guaranteed for
the oscillator frequency) is above V
IT-(LVD)
, the
MCU can only be in two modes:
– under full software control
– in static safe reset
In these conditions, secure operation is always en-
sured for the application without the need for ex-
ternal reset hardware.
During a Low Voltage Detector Reset, the RESET
pin is held low, thus permitting the MCU to reset
other devices.
Notes
:
The LVD is an optional function which can be se-
lected by option byte. See
section 15.1 on page
109
.
It allows the device to be used without any external
RESET circuitry.
If the LVD is disabled, an external circuitry must be
used to ensure a proper power-on reset.
Caution:
If an LVD reset occurs after a watchdog
reset has occurred, the LVD will take priority and
will clear the watchdog flag.
Figure 17. Low Voltage Detector vs Reset
V
DD
V
IT+
(LVD)
V
IT-
(LVD)
RESET
V
hys
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST7LITE15F1B6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ST7LITE1 - 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY.DATA EEPROM. ADC. 4 TIMERS. SPI |
| ST7LITE15F1M6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ST7LITE1 - 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY.DATA EEPROM. ADC. 4 TIMERS. SPI |
| ST7LITE19F1B6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ST7LITE1 - 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY.DATA EEPROM. ADC. 4 TIMERS. SPI |
| ST7LITE19F1M6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ST7LITE1 - 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY.DATA EEPROM. ADC. 4 TIMERS. SPI |
| ST7LITE1XB | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI |
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