參數(shù)資料
型號(hào): ST68C554
廠商: Exar Corporation
英文描述: QUAD UART WITH 16-BYTE FIFOS
中文描述: 四路的UART具有16字節(jié)FIFO
文件頁(yè)數(shù): 9/40頁(yè)
文件大小: 518K
代理商: ST68C554
ST16C554/554D/68C554
9
Rev. 3.10
SYMBOL DESCRIPTION
Symbol
Pin
Signal
type
Pin Description
68
64
XTAL1
35
25
I
Crystal or External Clock Input - Functions as a crystal input
or as an external clock input. A crystal can be connected
between this pin and XTAL2 to form an internal oscillator
circuit (see figure 8). Alternatively, an external clock can be
connected to this pin to provide custom data rates (see
Baud Rate Generator Programming).
XTAL2
36
26
O
Output of the Crystal Oscillator or Buffered Clock - (See also
XTAL1). Crystal oscillator output or buffered clock output.
-CD A-B
-CD C-D
9,27
43,61
64,18
31,49
I
Carrier Detect (active low) - These inputs are associated
with individual UART channels A through D. A logic 0 on this
pin indicates that a carrier has been detected by the modem
for that channel.
-CTS A-B
-CTS C-D
11,25
45,59
2,16
33,47
I
Clear to Send (active low) - These inputs are associated with
individual UART channels, A through D. A logic 0 on the -
CTS pin indicates the modem or data set is ready to accept
transmit data from the 554D. Status can be tested by
reading MSR bit-4.
-DSR A-B
-DSR C-D
10,26
44,60
1,17
32,48
I
Data Set Ready (active low) - These inputs are associated
with individual UART channels, A through D. A logic 0 on
this pin indicates the modem or data set is powered-on and
is ready for data exchange with the UART. This pin has no
effect on the UARTs transmit or receive operation. This pin
has no effect on the UARTs transmit or receive operation.
-DTR A-B
-DTR C-D
12,24
46,58
3,15
34,46
O
Data Terminal Ready (active low) - These inputs are
associated with individual UART channels, A through D. A
logic 0 on this pin indicates that the 554D is powered-on and
ready. This pin can be controlled via the modem control
register. Writing a logic 1 to MCR bit-0 will set the -DTR
output to logic 0, enabling the modem. This pin will be a logic
1 after writing a logic 0 to MCR bit-0. This pin has no effect
on the UARTs transmit or receive operation.
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