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參數(shù)資料
| 型號： | ST62E85BG1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, UVPROM, 8 MHz, MICROCONTROLLER, CQFP80 |
| 封裝： | CERAMIC, QFP-80 |
| 文件頁數(shù)： | 16/78頁 |
| 文件大?。?/td> | 868K |
| 代理商： | ST62E85BG1 |
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Obsolete
Product(s)
- Obsolete
Product(s)
23/78
ST62T85B/E85B
3.3 DIGITAL WATCHDOG
The digital Watchdog consists of a reloadable
downcounter timer which can be used to provide
controlled recovery from software upsets.
The Watchdog circuit generates a Reset when the
downcounter reaches zero. User software can
prevent this reset by reloading the counter, and
should therefore be written so that the counter is
regularly reloaded while the user program runs
correctly. In the event of a software mishap (usual-
ly caused by externally generated interference),
the user program will no longer behave in its usual
fashion and the timer register will thus not be re-
loaded periodically. Consequently the timer will
decrement down to 00h and reset the MCU. In or-
der to maximise the effectiveness of the Watchdog
function, user software must be written with this
concept in mind.
Watchdog behaviour is governed by one option,
known
as
“WATCHDOG
ACTIVATION”
(i.e.
HARDWARE or SOFTWARE) (See Table 8).
In the SOFTWARE option, the Watchdog is disa-
bled until bit C of the DWDR register has been set.
When the Watchdog is disabled, low power Stop
mode is available. Once activated, the Watchdog
cannot be disabled, except by resetting the MCU.
In the HARDWARE option, the Watchdog is per-
manently enabled. Since the oscillator will run con-
tinuously, low power mode is not available. The
STOP instruction is interpreted as a WAIT instruc-
tion, and the Watchdog continues to countdown.
When the MCU exits STOP mode (i.e. when an in-
terrupt is generated), the Watchdog resumes its
activity.
Table 8. Recommended Option Choices
Functions Required
Recommended Options
Stop Mode
“SOFTWARE WATCHDOG”
Watchdog
“HARDWARE WATCHDOG”
23
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