參數(shù)資料
型號(hào): ST52440F3
英文描述: MAX 7000 CPLD 64 MC 44-TQFP
中文描述: 8位重癥監(jiān)護(hù)病房與定時(shí)器/脈寬調(diào)制。模擬比較器??煽毓? PWM定時(shí)器。水分散粒劑。提供了8K存儲(chǔ)器
文件頁數(shù): 32/88頁
文件大?。?/td> 1162K
代理商: ST52440F3
ST52T430/E430
Analog Input Option. The PB0-PB7 pins can be
configured to be analog inputs according to the
codes programmed in the configuration register
REG_CONF 14 (See Table 6.7). These analog
inputs are connected to the on-chip 8-bit Analog to
Digital Converter.
Table 6.6 Port C REG_CONF 15
Bit
Name
Value
Description
0D0
0
Set the pin INT/PC0 in
Output Mode
1
Set the pin INT/PC0 in
Input Mode
1D1
0
Set the pin T0OUT/
PC1 in Output Mode
1
Set the pin T0OUT/
PC1 in Input Mode
2D2
0
Set the pin T1OUT/
PC2 in Output Mode
1
Set the pin T1OUT/
PC2 in Input Mode
3D3
0
Set the pin T2OUT/
PC3 in Output Mode
1
Set the pin T2OUT/
PC3 in Input Mode
4D4
0
Set the pin Tx/PC4 in
Output Mode
1
Set the pin Tx/PC4 in
Input Mode
5D5
0
Set the pin Rx/PC5 in
Output Mode
1
Set the pin Rx/PC5 in
Input Mode
6D6
0
Set the pin PC6 in
Output Mode
1
Set the pin PC6 in Input
Mode
7D7
0
Set the pin PC7 in
Output Mode
1
Set the pin PC7 in Input
Mode
Reset Configuration
‘11111111’
Table 6.7 Analog Inputs (REG_CONF 14)
Bit
Name
Value
Description
0D0
0
pin PB0/Ain0 Digital I/O
1
pin PB0/Ain0 Analog
1D1
0
pin PB1/Ain1 Digital I/O
1
pin PB1/Ain1 Analog
2D2
0
pin PB2/Ain2 Digital I/O
1
pin PB2/Ain2 Analog
3D3
0
pin PB3/Ain3 Digital I/O
1
pin PB3/Ain3 Analog
4D4
0
pin PB4/Ain4 Digital I/O
1
pin PB4/Ain4 Analog
5D5
0
pin PB5/Ain5 Digital I/O
1
pin PB5/Ain5 Analog
6D6
0
pin PB6/Ain6 Digital I/O
1
pin PB6/Ain6 Analog
7D7
0
pin PB7/Ain7 Digital I/O
1
pin PB7/Ain7 Analog
Reset Configuration ‘11111111’
相關(guān)PDF資料
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