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參數(shù)資料
| 型號： | SST55LD040M-133-C-BZJE |
| 元件分類： | 存儲控制器/管理單元 |
| 英文描述： | IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA145 |
| 封裝： | 12 X 12 MM, 1.07 MM HEIGHT, ROHS COMPLIANT, TFBGA-145 |
| 文件頁數(shù)： | 4/39頁 |
| 文件大?。?/td> | 589K |
| 代理商： | SST55LD040M-133-C-BZJE |
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Advance Information
NAND Controller
SST55LD040M
2010 Silicon Storage Technology, Inc.
S71408-01-000
04/10
CONFIGURABLE WRITE PROTECT/POWER-DOWN MODES
The WP#/PD# pin can be used for either Write Protect mode or Power-down mode, but only one mode is active at any time.
Either mode can be selected through the host command, Set-WP#/PD#-Mode.
Once the mode is set with this command, the pin will stay in the configured mode until the next time this command is issued.
Power-off or reset will not change the configured mode.
Write Protect Mode
When the WP#/PD# pin is configured in the Write Protect mode, the pin offers extended data protection. This feature can be
either selected through a jumper or host logic to protect the stored data from inadvertent system writes or erases, and
viruses. The Write Protect feature protects the full address space of the data stored on the flash media.
In the Write Protect mode, the WP#/PD# pin should be asserted prior to issuing all destructive commands: Erase-Sector,
Format-Track, Write-DMA, Write-Multiple, Write-Sector(s), or Write-Verify. This will force the NAND Controller to reject any
destructive commands from the ATA interface. All destructive commands will return 51H in the Status register and 04H in the
Error register signifying an invalid command. All non-destructive commands will be executed normally.
Power-down Mode
When the device is configured in the Power-down mode, if the WP#/PD# pin is asserted during a command, the NAND Con-
troller stops the current command, and immediately enters power-down mode. Afterwards, the device will not accept any
other commands. Both a software or a hardware reset will bring the device to normal operation with the WP#/PD# pin de-
asserted.
POWER-ON AND BROWN-OUT RESET CHARACTERISTICS
Power-on and Brown-out Reset circuitry reset the device to a known state. Power-on Reset asserts when the
device is turned on. Brown-out Reset asserts when the detected voltage falls below an acceptable level. For more
information about the Power-on and Brown-out Reset timing, see Figure 3and Table 4.
FIGURE 3: Power-on and Brown-out Reset Timing
TABLE
4: Power-on and Brown-out Reset Timing
Item
Symbol
Min
Max
Units
VDD/VDDQ Rise Time1
1.
VDD/VDDQ power sequencing: VDDQ power should come up at the same time as, or before, VDD power. The time between VDDQ and
VDD will not exceed 10 ms.
TR
250
ms
VDD/VDDQ Fall Time
TF
250
ms
T4.0 1408
1408 F01.0
VDD/VDDQ
TR
90%
10%
TF
90%
10%
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| SST55VD020-60-C-MVWE | 功能描述:閃存 ATA Media 60MHz 3.3V Commercial RoHS:否 制造商:ON Semiconductor 數(shù)據總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結構:256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| SST55VD020-60-C-TQWE | 功能描述:閃存 ATA Media 60MHz 2.7V Commercial RoHS:否 制造商:ON Semiconductor 數(shù)據總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結構:256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| SST55VD020-60-I-MVWE | 功能描述:總線收發(fā)器 ATA Media 60MHz 3.3V Industrial RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SST55VD020-60-I-TQWE | 功能描述:閃存 ATA Media 60MHz 3.3V Industrial RoHS:否 制造商:ON Semiconductor 數(shù)據總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結構:256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| SST55VD020-60-I-TQWE-TM024 | 功能描述:閃存 ATA Media 60MHz 3.3V Industrial RoHS:否 制造商:ON Semiconductor 數(shù)據總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結構:256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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