參數(shù)資料
型號: SP9841KS
英文描述: 8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC
中文描述: 8位八路,2象限乘法,BiCMOS工藝援
文件頁數(shù): 3/32頁
文件大?。?/td> 745K
代理商: SP9841KS
269
SPECIFICATIONS
(continued)
(V
DD
= +5V, All V
IN
X= +1.625V, V
REF
L = 0V, T
A
= 25
°
C for commercial–grade parts; T
MIN
T
A
= T
MAX
for industrial–grade parts; specifications apply to
all DAC's unless noted otherwise.)
PARAMETER
MIN.
TYP.
MAX.
DYNAMIC PERFORMANCE
SINAD
85
UNIT
CONDITIONS
dB
V
X = 0.8V
+ 1.4V p-p
D= FF
; 1kHz, f
= 80 kHz
SP9842 only; measured
between adjacent channels of
same pair; D = 7F
H
to 80
H
Digital Crosstalk
6
nVs
DAC OUTPUTS
Voltage Range
Output Current
0
V
DD
–1.5
V
R
L
= 5k
; V
= 4.75V
V
< 10mV, V
IN
X=1.625V,
PR = LOW
No Oscillation
±
10
±
15
mA
Capacitive Load
DIGITAL OUTPUT
Logic High
Logic Low
POWER REQUIREMENTS
Power Supply Range
Positive Supply Current
Power Dissipation
ENVIRONMENTAL AND MECHANICAL
Operating Temperature Range
Commercial
Industrial
Storage Temperature Range
Package
SP9841N
SP9841S
SP9842S
47,000
pF
3.5
V
V
I
OH
= -0.4mA
I
OL
= 1.6mA
0.4
4.75
5.00
13
65
5.25
V
To rated specifications
PR = LOW
mA
mW
0
+70
+85
+150
°
C
°
C
°
C
–40
–65
24–pin Plastic DIP
24–pin SOIC
20–pin SOIC
Note 3
Notes:
1
The op amp limits the linearity for V
100mV. When V
is driven above ground such that the
output voltage remains above 100mV, then the linearity specifications apply to all codes. For V
=
GND, V
= 1.5V, codes 0 through 7 are not included in differential or integral linearity tests. Integral
and differential linearity are computed with respect to the best fit straight line through codes 8
through 255.
SP9841
is measured between adjacent channels, f = 100kHz;
SP9842
is measured between
adjacent pairs, f = 100kHz.
For plastic DIP packaging of
SP9842
, please consult factory.
2
3
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