參數(shù)資料
型號: SN54ALVTH16374WD
廠商: Texas Instruments, Inc.
元件分類: 基準電壓源/電流源
英文描述: 800mA, 5.0V Output, Low Dropout Voltage Regulator; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98
中文描述: 2.5-V/3.3-V 16位邊沿觸發(fā)的D型倒裝3觸發(fā)器態(tài)輸出
文件頁數(shù): 7/16頁
文件大?。?/td> 422K
代理商: SN54ALVTH16374WD
SN54ALVTH16374, SN74ALVTH16374
2.5-V/3.3-V 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCES068F – JUNE 1996 – REVISED JANUARY 1999
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range, V
CC
= 2.5 V
±
0.2 V
(unless otherwise noted) (see Figure 1)
SN54ALVTH16374
MIN
SN74ALVTH16374
MIN
UNIT
MAX
MAX
fclock
tw
Clock frequency
150
150
MHz
Pulse duration, CLK high or low
1.5
1.5
ns
tsu
Setup time data before CLK
Setup time, data before CLK
Data high
1.1
1
ns
Data low
1.4
1.3
th
Hold time data after CLK
Hold time, data after CLK
Data high
0.6
0.5
ns
Data low
0.9
0.8
timing requirements over recommended operating free-air temperature range, V
CC
= 3.3 V
±
0.3 V
(unless otherwise noted) (see Figure 2)
SN54ALVTH16374
MIN
SN74ALVTH16374
MIN
UNIT
MAX
MAX
fclock
tw
Clock frequency
250
250
MHz
Pulse duration, CLK high or low
1.5
1.5
ns
tsu
Setup time data before CLK
Setup time, data before CLK
Data high
1.1
1
ns
Data low
1.6
1.5
th
Hold time data after CLK
Hold time, data after CLK
Data high
0.6
0.5
ns
Data low
1.1
1
switching characteristics over recommended operating free-air temperature range, C
L
= 30 pF,
V
CC
= 2.5 V
±
0.2 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
SN54ALVTH16374
MIN
SN74ALVTH16374
MIN
UNIT
(OUTPUT)
MAX
MAX
fmax
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
150
150
MHz
CLK
Q
1.4
3.9
1.5
3.8
ns
1.4
3.9
1.5
3.8
OE
Q
1
4.2
1
4.1
ns
1
3.8
4.3
1
3.7
4.2
OE
Q
1.7
1.8
ns
1
3.5
1
3.4
switching characteristics over recommended operating free-air temperature range, C
L
= 50 pF,
V
CC
= 3.3 V
±
0.3 V (unless otherwise noted) (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
SN54ALVTH16374
MIN
SN74ALVTH16374
MIN
UNIT
(OUTPUT)
MAX
MAX
fmax
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
250
250
MHz
CLK
Q
1
3.4
1
3.2
ns
1
3.3
1
3.2
OE
Q
1
3.9
1
3.8
ns
1
1
3.4
4.7
1
1
3.3
4.6
OE
Q
ns
1
4.4
1
4.2
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
相關(guān)PDF資料
PDF描述
SN54ALVTH16374 2.5-V/3.3-V 16-Bit Edge-Triggered D-Type Flip-Flops With 3-State Outputs(2.5V/3.3V 16位邊沿D觸發(fā)器(三態(tài)輸出))
SN54ALVTH16500 2.5-V/3.3-V 18-Bit Universal Bus Transceivers With 3-State Outputs( 2.5V/3.3V 18位通用總線收發(fā)器(三態(tài)輸出))
SN74ALVTH16500 2.5-V/3.3-V 18-Bit Universal Bus Transceivers With 3-State Outputs( 2.5V/3.3V18位通用總線收發(fā)器(三態(tài)輸出))
SN54ALVTH16501 2.5-V/3.3-V 18-Bit Universal Bus Transceivers With 3-State Outputs( 2.5V/3.3V 18位通用總線收發(fā)器(三態(tài)輸出))
SN74ALVTH16501 2.5-V/3.3-V 18-Bit Universal Bus Transceivers With 3-State Outputs( 2.5V/3.3V18位通用總線收發(fā)器(三態(tài)輸出))
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