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參數資料
| 型號： | SN54ALVTH16244 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 2.5-V/3.3-V 16-Bit Buffers/Drivers(2.5V/3.3V 16位緩沖器/驅動器(三態(tài)輸出)) |
| 中文描述： | 2.5-V/3.3-V 16位緩沖器/驅動器（2.5V/3.3V的16位緩沖器/驅動器（三態(tài)輸出）） |
| 文件頁數： | 1/9頁 |
| 文件大?。?/td> | 202K |
| 代理商： | SN54ALVTH16244 |
SN54ALVTH16244, SN74ALVTH16244
2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCES070A – JUNE 1996 – REVISED JULY 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Members of the Texas Instruments
Widebus
Family
High-Impedance State During Power Up
and Power Down
5-V I/O Compatible
High-Drive Capability (–32 mA/64 mA)
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Auto 3-State Eliminates Bus Current
Loading When Voltage at the Output
Exceeds V
CC
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Power Off Disables Inputs/Outputs,
Permitting Live Insertion
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL), Thin Shrink
Small-Outline (DGG), Thin Very
Small-Outline (DGV) Packages, and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
description
The ’ALVTH16244 are 16-bit buffers/line drivers
designed for 2.5-V or 3.3-V V
CC
operation, but
with the capability to provide a TTL interface to a
5-V system environment. These devices can be
used as four 4-bit buffers, two 8-bit buffers, or one
16-bit buffer.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
When V
CC
is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.2 V, OE should be tied to V
CC
through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74ALVTH16244 is available in TI’s thin very small-outline package (DGV), which provides the same I/O
pin count and functionality of standard Widebus packages in less than half the printed circuit board area.
The SN54ALVTH16244 is characterized for operation over the full military temperature range of –55
°
C to
125
°
C. The SN74ALVTH16244 is characterized for operation from –40
°
C to 85
°
C.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Y
OE
L
A
H
H
L
L
L
H
X
Z
Copyright
1996, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments Incorporated.
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25
1OE
1Y1
1Y2
GND
1Y3
1Y4
V
CC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
V
CC
4Y1
4Y2
GND
4Y3
4Y4
4OE
2OE
1A1
1A2
GND
1A3
1A4
V
CC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
V
CC
4A1
4A2
GND
4A3
4A4
3OE
SN54ALVTH16244 . . . WD PACKAGE
SN74ALVTH16244 . . . DGG, DGV, OR DL PACKAGE
(TOP VIEW)
P
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| SN54ALVTH16245 | 2.5-V/3.3-V 16-Bit Bus Transceivers With 3-State Outputs(2.5V/3.3V 16位總線收發(fā)器(三態(tài)輸出)) |
| SN54ALVTH162827 | 2.5-V/3.3-V 20-Bit Buffers/Drivers(2.5V/3.3V 20位緩沖器/驅動器(三態(tài)輸出)) |
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| SN74ALVTH16373DGV | 2.5-V/3.3-V 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
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