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參數(shù)資料
| 型號： | SN54ACT16374WD |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | 16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS |
| 中文描述： | 16位D型沿觸發(fā)器與觸發(fā)器3態(tài)輸出 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 178K |
| 代理商： | SN54ACT16374WD |
SN54ACT16374, 74ACT16374
16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCAS124B – MARCH 1990 – REVISED APRIL 1996
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
°
C
TYP
SN54ACT16374
MIN
4.4
74ACT16374
MIN
4.4
UNIT
MIN
4.4
MAX
MAX
MAX
IOH= 50 A
IOH = –50 A
4.5 V
5.5 V
5.4
5.4
5.4
IOH= 24 mA
IOH = –24 mA
4.5 V
3.94
3.7
3.8
VOH
5.5 V
4.94
4.7
4.8
V
IOH = –50 mA
5.5 V
3.85
IOH = –75 mA
5.5 V
3.85
IOL= 50 A
IOL = 50 A
4.5 V
0.1
0.1
0.1
5.5 V
0.1
0.1
0.1
IOL= 24 mA
IOL = 24 mA
4.5 V
0.36
0.5
0.44
VOL
5.5 V
0.36
0.5
0.44
V
IOL = 50 mA
5.5 V
1.65
IOL = 75 mA
VI = VCC or GND
VO = VCC or GND
VI = VCC or GND,
One input at 3.4 V,
Other inputs at GND or VCC
VI = VCC or GND
VO = VCC or GND
5.5 V
1.65
II
IOZ
ICC
5.5 V
±
0.1
±
0.5
±
1
±
1
±
5
80
A
5.5 V
±
10
160
A
IO = 0
5.5 V
8
A
ICC
5 5 V
5.5 V
0 9
0.9
1
1
mA
Ci
Co
5 V
4.5
pF
5 V
12
pF
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V to VCC.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
TA = 25
°
C
MIN
SN54ACT16374
MIN
74ACT16374
MIN
UNIT
MAX
MAX
MAX
fclock
Clock frequency
0
65
0
65
0
65
MHz
tw
Pulse duration
CLK low
7.5
7.5
7.5
ns
CLK high
4.5
4.5
4.5
tsu
th
Setup time, data before CLK
↑
Hold time, data after CLK
↑
6.5
6.5
6.5
ns
1
1
1
ns
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