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參數(shù)資料
| 型號(hào)： | SN54ACT16374WD |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | 16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS |
| 中文描述： | 16位D型沿觸發(fā)器與觸發(fā)器3態(tài)輸出 |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大?。?/td> | 178K |
| 代理商： | SN54ACT16374WD |
SN54ACT16374, 74ACT16374
16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCAS124B – MARCH 1990 – REVISED APRIL 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Members of the Texas Instruments
Widebus Family
Inputs Are TTL-Voltage Compatible
3-State Bus-Driving True Outputs
Flow-Through Architecture Optimizes
PCB Layout
Distributed Center-Pin V
CC
and GND
Configurations Minimize High-Speed
Switching Noise
EPIC (Enhanced-Performance Implanted
CMOS) 1- m Process
500-mA Typical Latch-Up Immunity at
125
°
C
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Packages Using
25-mil Center-to-Center Pin Spacings and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Pin Spacings
description
The SN54ACT16374 and 74ACT16374 are 16-bit
edge-triggered D-type flip-flops with 3-state
outputs
designed
specifically
highly-capacitive or relatively low-impedance
loads. They are particularly suitable for
implementing
buffer
bidirectional bus drivers, and working registers.
for
driving
registers,
I/O
ports,
These devices can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock
(CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.
An output-enable input (OE) can be used to place the outputs in either a normal logic state (high or low logic
levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state provides the capability to drive bus lines in a bus-organized system
without need for interface or pullup components. OE does not affect the internal operations of the flip-flop. Old
data can be retained or new data can be entered while the outputs are in the high-impedance state.
The 74ACT16374 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and
functionality of standard small-outline packages in the same printed-circuit board area.
The SN54ACT16374 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C.
The 74ACT16374 is characterized for operation from –40
°
C to 85
°
C.
Copyright
1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
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1OE
1Q1
1Q2
GND
1Q3
1Q4
V
CC
1Q5
1Q6
GND
1Q7
1Q8
2Q1
2Q2
GND
2Q3
2Q4
V
CC
2Q5
2Q6
GND
2Q7
2Q8
2OE
1CLK
1D1
1D2
GND
1D3
1D4
V
CC
1D5
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
V
CC
2D5
2D6
GND
2D7
2D8
2CLK
SN54ACT16374 . . . WD PACKAGE
74ACT16374 . . . DL PACKAGE
(TOP VIEW)
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