參數(shù)資料
型號: SN54AC533FK
廠商: Texas Instruments, Inc.
英文描述: OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
中文描述: 有三態(tài)輸出的8個透明D型鎖存器
文件頁數(shù): 1/6頁
文件大?。?/td> 121K
代理商: SN54AC533FK
SN54AC533, SN74AC533
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCAS555A – NOVEMBER 1995 – REVISED MAY 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
3-State Inverting Outputs Drive Bus Lines
Directly
Full Parallel Access for Loading
EPIC
(Enhanced-Performance Implanted
CMOS) 1-
μ
m Process
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW),
Ceramic Chip Carriers (FK) and
Flatpacks (W), and Standard Plastic (N) and
Ceramic (J) DIPs
description
The ’AC533 are octal transparent D-type latches
with 3-state outputs. When the latch-enable (LE)
input is high, the Q outputs follow the
complements of the data (D) inputs. When LE is
taken low, the Q outputs are latched at the inverse
logic levels set up at the D inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or a high-
impedance state. In the high-impedance state,
the outputs neither load nor drive the bus lines
significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without need for interface or pullup
components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
The SN54AC533 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C. The
SN74AC533 is characterized for operation from –40
°
C to 85
°
C.
FUNCTION TABLE
(each latch)
INPUTS
LE
OUTPUT
Q
OE
D
L
H
H
L
L
H
L
H
L
L
X
Q0
Z
H
X
X
Copyright
1996, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
parameters.
EPIC is a trademark of Texas Instruments Incorporated.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
SN54AC533 . . . J OR W PACKAGE
SN74AC533 . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
SN54AC533 . . . FK PACKAGE
(TOP VIEW)
1
1
O
5
5
8
4
G
L
V
C
相關(guān)PDF資料
PDF描述
SN74AC533DB OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74AC533PWR Low-Voltage CMOS Hex Buffer with Open Drain Outputs and 5V-Tolerant Inputs; Package: TSSOP-14; No of Pins: 14; Container: Tape and Reel; Qty per Container: 2500
SN54AC533J OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
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SN54AC533 Octal D-Type Transparent Latches With 3-State Outputs(八D鎖存器(三態(tài)輸出))
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