參數(shù)資料
型號(hào): SMT4504
英文描述: Four-Channel Loss-Less TrakkerTM Power Supply Manager
中文描述: 四通道無(wú)損耗TrakkerTM電源管理器
文件頁(yè)數(shù): 13/20頁(yè)
文件大?。?/td> 248K
代理商: SMT4504
SMT4504
Preliminary Information
Summit Microelectronics, Inc
2071 1.1 01/07/05
13
The SMM665 powers up into a write protected mode.
Writing a code to the volatile write protection register
can disable the write protection. The write protection
register is located at address 87
HEX
of slave address
1001
BIN
.
Writing 0101
BIN
to bits [7:4] of the write protection
register allow writes to the general-purpose memory
while writing 0101
BIN
to bits [3:0] allow writes to the
configuration registers. The write protection can re-
enable by writing other codes (not 0101
BIN
) to the write
protection register. Writing to the write protection
register is shown in Figure 7.
CONFIGURATION REGISTERS
The majority of the configuration registers are grouped
with the general-purpose memory located at either
slave address 1010
BIN
or 1011
BIN
. The bus address
bits, A[1:0], used to differentiate the general-purpose
memory from the configuration registers are set to
11
BIN
. Bus address bit A[2] can be programmed as
either 0 or biased by the A2 pin.
Two additional configuration registers are located at
addresses 83
HEX
and 84
HEX
of slave address 1001
BIN
.
Writing and reading the configuration registers is
shown in Figures 8, 9, 10,11 and 12.
Note: Configuration writes or reads of registers 00
HEX
to 0F
HEX
should not be performed while the SMM665 is
margining.
GENERAL-PURPOSE MEMORY
The 4k-bit general-purpose memory is located at
either slave address 1010
BIN
or 1011
BIN
. The bus
address bits, A[1:0], used to differentiate the general-
purpose memory from the configuration registers are
set to 00
BIN
for the first 2k-bits and 01
BIN
for the second
2k-bits. Bus address bit A[2] can be programmed as
either 0 or biased by the A2 pin.
Slave Address
Figures 13, 14 and 15.
COMMAND AND STATUS REGISTERS
The command and status registers are located at
slave address 1001
BIN
. Writes and reads of the
command and status registers are shown in Figures
16 and 17.
ADC CONVERSIONS
An ADC conversion on any monitored channel can be
performed and read over the I
2
C bus using the ADC
read command. The ADC read command, shown in
Figure 18, starts with a dummy write to the 1001
BIN
slave address. Bits [6:3] of the word address byte are
used to address the desired monitored input. Once
the device acknowledges the channel address, it
begins the ADC conversion of the addressed input.
This conversion requires 70
μ
s to complete. During
this conversion time, acknowledge polling can be
used. The SMM665 will not acknowledge the address
bytes until the conversion is complete. When the
conversion
has
completed,
acknowledge the address byte and return the 10-bit
conversion along with a 4-bit channel address echo.
GRAPHICAL USER INTERFACE (GUI)
Device configuration utilizing the Windows based
SMM665 graphical user interface (GUI) is highly
recommended. The software is available from the
Summit website (
www.summitmicro.com
). Using the
GUI in conjunction with this datasheet and Application
Note 33, simplifies the process of device prototyping
and the interaction of the various functional blocks. A
programming Dongle (SMX3200) is available from
Summit to communicate with the SMM665. The
Dongle connects directly to the parallel port of a PC
and programs the device through a cable using the I
2
C
bus protocol.
Register Type
the
SMM665
will
Bus Address
1001
BIN
A2 A1 A0
Write Protection Register,
Command and Status Registers,
Two Configuration Registers,
ADC Conversion Readout
1
st
2-k Bits of General-Purpose
Memory
2
nd
2-k Bits of General-Purpose
Memory
Configuration Registers
A2 0 0
A2 0 1
1010
BIN
or
1011
BIN
A2 1 1
Table 1 - Address bytes used by the SMM665.
I
2
C PROGRAMMING INFORMATION (CONTINUED)
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