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SMT4504
Preliminary Information
Summit Microelectronics, Inc
2071 1.1 01/07/05
10
MONITORING
Once the power-on sequence is underway, the
SMT4504 monitors VM
X
inputs and the VDD and
VCTRL_SUP
supply
voltages.
compares the voltages with the programmable low and
high limits (UV/OV). Each of these limits can be
programmed to trigger the RST, IRQ# or HEALTHY
input as well as a force shutdown or power-off
operation if exceeded.
FORCED SHUTDOWN
The Forced Shutdown function is used to immediately
turn off all PUP outputs when there is not enough time
to perform a power-off sequence. Forced Shutdown
can be initiated by asserting the FS pin, by writing to
the forced shutdown bit of the command register, or
triggered by one or more channels going out of limits.
Forced Shutdown cannot be triggered by a channel
going out of limit until the power-on sequence has
completed. Forced Shutdown will latch the PUP
outputs in the off state until the FS pin is de-asserted
and the PWR_ON pin is toggled. Input on the
PWR_ON pin will be ignored until all supplies are
below their OFF thresholds.
COMMUNICATING WITH THE SMT4504
All communication with the SMT4504 takes place over
the I
C bus. The part has several registers that contain
information about the channels that are being
controlled and the set point and limit information. The
slave address for the configuration registers and the 4-
k of memory is programmable. When accessing the
configuration registers, [A1, A0] is used as the bus
address. Write protection for the SMT4504 is located
in a volatile register where the power-on state is
defaulted to write protect.
SUMMARY OF DEVICE OPERATION
When the SMT4504 first receives power it will hold all
PUP outputs and the HEALTHY output in their inactive
state. The RST output will be held active. At this point,
the VCTRL
X
outputs will be turned on to their
respective programmed voltages. The device will then
monitor the VDD and VCTRL_SUP inputs until both
are in the appropriate range.
The
SMT4504
Once the PWR_ON/OFF signal goes active and the
VDD and VCTRL_SUP input is within range, the PUP
outputs of all channels in sequence position 1 will go
active and the device will monitor those converter
outputs. Once those converter outputs have gone
above the UV settings, the PUP outputs of the
channels in sequence position 2 will go active.
As the channels are powering on, the device will
monitor the VDD and VCTRL_SUP inputs. The
HEALTHY output will go active when all trigger
sources are within their programmed limits. The RST
output will go inactive a programmable timeout period
after all trigger sources are within their programmed
limits and the MR signal has gone inactive.
During the power-on sequence an abort timer will start
as each PUP output goes active. The channel that is
associated with that PUP must reach its lower limit
before the abort timer expires. If it does not then all
channels are shut down and the Abort Timer bit is set
in Status Register1.
Once the power-on sequence is complete, the device
will monitor all. The result of each monitor conversion
will be compared against the preset high and low limits
for that channel. If a voltage channel is found to be out
of limits then HEALTHY will be de-asserted. In either
case the UV/OV sensors will continue to monitor all
channels. When the problem channel is back in limits
the HEALTHY will be asserted again. The number of
sequential conversions that must be completed in
order to declare in or out of limit is set in Configuration
Register 1. The state of the channels can be checked
by reading the status registers.
When the PWR_ON/OFF pin is de-asserted the device
will begin a power-off operation. First, HEALTHY will
go inactive. Then the SMT4504 will de-assert the last
VCTRL
X
(or
PUP)
output
corresponding voltage output. When the output has
dropped below the “off” limit for a programmed number
of consecutive conversions the next VCTRL
X
(or PUP)
outputs will be de-asserted in the reverse sequence
order as power-on (3-0). A power-off operation can
also be initiated by a fault condition on any of the
channels. During the power-off sequencing the abort
timer is again used to ensure that the sequencing
takes place properly. If the abort timer finishes before
a channel drops below the off level, all channels will
be shut down and the Abort Timer bit is set in Status
Register 1.
and
monitor
the
APPLICATIONS INFORMATION (CONTINUED)