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參數(shù)資料
| 型號： | SME5434PCI-480 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 64-BIT, 480 MHz, RISC PROCESSOR, XMA |
| 封裝： | 130 X 100 MM, 45 MM HEIGHT MODULE |
| 文件頁數(shù)： | 8/34頁 |
| 文件大?。?/td> | 418K |
| 代理商： | SME5434PCI-480 |
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SME5431PCI-360
SME5434PCI-440
SME5434PCI-480
Preliminary
360/440/480MHz CPU; 0.25 to 2 MB L2 cache, UPA64S, 66MHz PCI
UltraSPARC-IIi CPU Module
March 1999
Sun Microsystems, Inc
POWER REQUIREMENTS
The UltraSPARC-IIi CPU Module requires two VDD supply voltages, VDD and VDD_CORE, nominally at 3.3 V
and 1.9 V respectively. These supplies pass to the module through connector blades on both 120-pin and
180-pin connectors. The VDD_CORE supplied by the system board is programmable from the module through
resistor stufng options driving the VID[4:0] bits in accordance with the table on page 17.
DC Characteristics
Symbol
Parameter
Conditions
Min
Typ.
Max.
Unit
VOH
High-level output
voltage
1.9V signals
VDD = Min, IOH = Max
1.5
–
V
3.3V non-PCI signals
2.4
–
V
3.3V PCI signals
Iout = -500
A
0.9VDD
––
V
VOL
Low-level output
voltage
1.9V signals
VDD = Min, IOL = Max
–
0.4
V
3.3V non-PCI signals
–
0.4
V
3.3V PCI signals
Iout = 1500
A
–
0.1VDD
V
VIH
High-level input
voltage
1.9V signals
VDD_CORE = Max
1.30
–
V
PECL signals
-
VDD- 0.7
–
V
3.3V non-PCI signals
VDD = Max
2.0
–
V
3.3V PCI signals
0.5VDD
–VDD+ 0.5
V
VIL
Low-level input
voltage
1.9V signals
VDD_CORE = Min
–
0.4
V
PECL signals
–
VDD-1.4
–
V
3.3V non-PCI signals
VDD = Min
–
0.8
V
3.3V PCI signals
- 0.5
–
0.3VDD
V
IDD
supply current for
VDD
[1]
1.
Typical DC current values represent the current drawn at nominal voltage with a typical, busy computing load. Variations in the device, computing
load, and system implementation affect the actual current.
Maximum DC current values will rarely, if ever, be exceeded running all known
computing loads over the entire operating range. The maximum values are based on simulations.
360 MHz
VDD = 3.3 V
–
2.0
2.5
A
440 MHz
–
2.4
3.0
A
480 MHz
–
2.7
3.2
A
IDD_CORE
Supply current for
VDD_CORE
360 MHz
VDD_CORE = 1.9 V
–
6.5
8.2
A
440 MHz
–
8.0
10.0
A
480 MHz
–
8.6
10.8
A
IOZ
High-impedance output current
VDD = Max, VO = 2.4 V
–
20
A
VDD = Max, VO = 0.4 V
–
-20
A
II
Input current (inputs without pullups)
VDD = Max;
VI = VSS to VDD
––
20
A
Input current (inputs with pullups [2])
2. See "JTAG/Test Interface" on page 9 for description of which inputs are attached to pullups.
VDD = Max;
VI = VSS to VDD
–
250
A
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