參數(shù)資料
型號: SM5L3
廠商: SHARP ELECTRONICS CORP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, MICROCONTROLLER, PQFP80
封裝: 14 X 20 MM, PLASTIC, QFP-80
文件頁數(shù): 10/27頁
文件大小: 164K
代理商: SM5L3
SM5L1/SM5L2/SM5L3
4-Bit Single Chip Microcomputers
18
Microcomputer Data Sheet
Standby Function
A standby function is available which temporarily
stops program execution to conserve power consump-
tion. The state during which a program is in execution
is called the operation mode and the state during which
the execution is temporarily stopped is called the
standby mode.
The standby mode further contains two modes, the
stop mode and the halt mode. The stop mode stops the
system section. In the stop mode, the display (LCD) is
blanked. And the response speed of LCD returning to
the display state (the operation) drops slightly.
The halt mode stops only the system clock genera-
tor circuit, the state of the LCD is retained. This mode
is used to activate the system immediately after a con-
dition causes a release to the operation mode.
To enter the standby mode, select either stop mode
or halt mode, whichever is appropriate. See Figure 23.
During the standby mode, the contents of the RAM
and C flag are retained. The contents of the flags, regis-
ters and output latches shown below are also retained.
Flags
– IFA flag
– IFD flag
– IME flag
Registers
– ACC
– X register
– BM, BL register
– SP
– SR
Output latch registers
– P0 register
– P1 register
– P2 register
A release from the standby mode to the operation
mode is performed by a reset port input, an interrupt
from the nonmaskable INTA and divider. A maskable
interrupt request cannot become a factor in releasing
back to the operation mode. The mask setting is per-
formed with RE register, see Table 1.
TRANSITION FROM THE OPERATION MODE TO
THE STANDBY MODE
The HALT instruction is executed to set the halt
mode and the STOP instruction is executed to set the
stop mode.
Since the interrupt is used to release from the standby
mode, the mode does not transfer to the standby mode
if any of the following conditions are satisfied during exe-
cution of the STOP or HALT instruction.
RE0 is set and the INTA level is HIGH.
RE2 is set and the IFD flag is set.
If any of the conditions above are satisfied, the mode
does not transfer to the standby mode even if the
STOP or HALT instruction is executed and the instruc-
tion at the address following that of the STOP or HALT
instruction is executed. Therefore, place the JUMP
instruction which specified step ‘0’ on page 3 to the
location at the address following that of the STOP or
HALT instruction.
When all of P10 to P13 levels are HIGH, the SM5Lx is pro-
grammed to release the standby mode and enter a normally
hardware reset operation (mask option).
CAUTION
Figure 23. Operation Shift of Program
NORMAL
OPERATION
HALT MODE
RELEASE EVENT
RUN STOP
COMMAND
STOP MODE
RELEASE EVENT
RUN HALT
COMMAND
HALT MODE
STOP MODE
STANDBY MODE
OPERATION MODE
5L1-23
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