參數(shù)資料
型號: SL15300ZCT
廠商: Silicon Laboratories Inc
文件頁數(shù): 1/16頁
文件大小: 0K
描述: IC CLOCK SSCG 1PLL 2CH 8TSSOP
標(biāo)準(zhǔn)包裝: 2,500
系列: *
Rev 2.0, October 11, 2010
Page 1 of 16
400 West Cesar Chavez, Austin, TX 78701
1+(512) 416-8500
1+(512) 416-9669
www.silabs.com
SL15300
Key Features
Low power dissipation
- 7.9mA-typ at 66MHz and VDD=3.3V
- 7.0mA-typ at 66MHz and VDD=2.5V
Wide 2.5V to 3.3V +/-10% power supply range
Programmable 4 outputs from 3 to 200MHz
Low Jitter
- TBDps at 66MHz
Programmable Center or Down Spread Modulation
from 0.25 to 5.0%
8 to 48 MHz external crystal range
8 to 166 MHz external clock range
Integrated internal voltage regulator
Programmable PD#/OE/SSON#/FS functions
Programmable CL at XIN and XOUT pins
Programmable output rise and fall times
SSC modulation frequency is 32kHz-typ
Applications
Printers, MFPs
Digital Copiers
NBPCs and LCD Monitors
Routers, Servers and Switchers
HDTV and DVD-R/W
Description
The SL15300 a programmable low power Spread
Spectrum Clock Generator (SSCG) used for reducing
Electromagnetic Interference (EMI). The product is
designed using SpectraLinear proprietary programmable
EProClock phase-locked loop (PLL) and Spread
Spectrum Clock (SSC) technology to synthesize and
modulate the input clock. The modulated clock can
significantly reduce the measured EMI levels, and leading
to the compliance with regulatory agency requirements.
Up to 4 output clock frequencies, Spread %, output rise
and fall times, crystal load, modulation frequency and
PD#/OE/SSON#/FS functions can be programmed to meet
the needs of wide range of applications. The SL15300
operates from 2.5V to 3.3V power supply voltage range.
The product is offered in 8-pin TSSOP package with
commercial and industrial grades.
Refer to SL15L300 Programmable SSCG product for 1.8V
power supply operation.
Benefits
Peak EMI reduction of 8 to 16 dB
Fast time-to-market
Cost Reduction
Reduction of PCB layers
Eleminates the need for higher order crystals (Xtals)
and crystal oscillators (XOs)
Block Diagram
3
PLL with
Modulation Control
7
Programmable
Configuration Register
2
300K
CLKOUT
XIN/CLKIN
XOUT
VSS
VDD
Output
Buffers,
Dividers
and
Switch
Matrix
PCin
PCout
6
REFOUT
1
5
V-Reg
To
Core
To I/O
4
8
PD#
SSON#
Programmable Spread Spectrum Clock Generator (SSCG)
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