參數(shù)資料
型號: SI3230-KT
廠商: Silicon Laboratories Inc
文件頁數(shù): 29/108頁
文件大?。?/td> 0K
描述: IC SLIC PROG 1-CH 38TSSOP
標(biāo)準(zhǔn)包裝: 50
系列: ProSLIC®
功能: 用戶線路接口概念(SLIC)
接口: SPI
電路數(shù): 1
電源電壓: 3.13 V ~ 5.25 V
電流 - 電源: 88mA
功率(瓦特): 700mW
安裝類型: 表面貼裝
封裝/外殼: 38-TFSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 38-TSSOP
包裝: 管件
包括: DTMF 生成和解碼,F(xiàn)SK 生成
Si3230
Preliminary Rev. 0.96
27
Not
Recommended
fo
r N
ew
D
esi
gn
s
2.3.2. Oscillator Frequency and Amplitude
Each of the two tone generators contains a two-pole
resonate
oscillator
circuit
with
a
programmable
frequency and amplitude, which are programmed via
indirect registers OSC1, OSC1X, OSC1Y, OSC2,
OSC2X, and OSC2Y. The sample rate for the two
oscillators is 8000 Hz. The equations are as follows:
coeffn = cos(2fn/8000 Hz),
where fn is the frequency to be generated;
OSCn = coeffn x(2
15);
where desired Vrms is the amplitude to be generated;
OSCnY = 0,
n = 1 or 2 for oscillator 1 or oscillator 2, respectively.
For example, in order to generate a DTMF digit of 8, the
two required tones are 852 Hz and 1336 Hz. Assuming
the generation of half-scale values (ignoring twist) is
desired, the following values are calculated:
OSC1Y = 0
OSC2 = 0.49819 (215) = 16324 = 3FC4h
OSC2Y = 0
The computed values above would be written to the
corresponding registers to initialize the oscillators. Once
the oscillators are initialized, the oscillator control
registers can be accessed to enable the oscillators and
direct their outputs.
2.3.3. Tone Generator Cadence Programming
Each of the two tone generators contains two timers,
one for setting the active period and one for setting the
inactive period. The oscillator signal is generated during
the active period and suspended during the inactive
period. Both the active and inactive periods can be
programmed from 0 to 8 seconds in 125 s steps. The
active period time interval is set using OAT1 (direct
registers 36 and 37) for tone generator 1 and OAT2
(direct registers 40 and 41) for tone generator 2.
To enable automatic cadence for tone generator 1,
define the OAT1 and OIT1 registers and then set the
O1TAE bit (direct Register 32, bit 4) and O1TIE bit
(direct Register 32, bit 3). This enables each of the
timers to control the state of the Oscillator Enable bit,
O1E (direct Register 32, bit 2). The 16-bit counter will
begin counting until the active timer expires, at which
time the 16-bit counter will reset to zero and begin
counting until the inactive timer expires. The cadence
continues until the user clears the O1TAE and O1TIE
control bits. The zero crossing detect feature can be
implemented by setting the OZ1 bit (direct Register 32,
bit 5). This ensures that each oscillator pulse ends
without a dc component. The timing diagram in
Figure 12 is an example of an output cadence using the
zero crossing feature.
One-shot oscillation can be achieved by enabling O1E
and O1TAE. Direct control over the cadence can be
achieved by controlling the O1E bit (direct Register 32,
bit 2) directly if O1TAE and O1TIE are disabled.
The operation of tone generator 2 is identical to that of
tone generator 1 using its respective control registers.
Note:
Tone Generator 2 should not be enabled simultane-
ously with the ringing oscillator due to resource sharing
within the hardware.
Continuous
phase
frequency-shift
keying
(FSK)
waveforms may be created using tone generator 1 (not
available on tone generator 2) by setting the REL bit
(direct Register 32, bit 6), which enables reloading of
the OSC1, OSC1X, and OSC1Y registers at the
expiration of the active timer (OAT1).
OSCnX
1
4
---
1
coeff
1
coeff
+
------------------------
2
15
1
Desired V
rms
1.11 V
rms
-------------------------------------
=
coeff
1
2
852
8000
-----------------
cos
0.78434
==
OSC1
0.78434 2
15
25701
6465h
=
==
OSC1X
1
4
---
0.21556
1.78434
---------------------
2
15
1
0.5
1424
590h
=
coeff
2
1336
8000
--------------------
cos
0.49819
==
OSC2X
1
4
---
0.50181
1.49819
---------------------
2
15
1
0.5
2370
942h
=
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