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303 S. Technology Court, Broomfield, CO 80021
Phone: (800) SMI-MMIC
2
http://www.sirenza.com
EDS-XXXXXX Rev A
Advance
S DM-08060 869-894 MHz 60W Amp
Pin Out Description
Pin #
Function
Description
1,5
V
GS
Ground
This is the gate bias for the one side of the amplifier module.
2,4,7,9
Module Topside ground.
3
RF Input
Module RF input. This pin is internally connected to DC ground. Do not apply DC voltages to the RF leads.
Care must be taken to protect against video transients that may damage the active devices.
6,10
V
DD
This is the drain feed for the amplifier module. See Note 1.
8
RF Output
Module RF output. This pin is internally connected to DC ground. Do not apply DC voltages to the RF leads.
Care must be taken to protect against video transients that may damage the active devices.
Flange
Gnd
Exposed area on the bottom side of the package provides electrical ground and a thermal transfer path for the
device. Proper mounting insures optimal performance and the highest reliablility. See Sirenza applications
note:AN-054 Detailed Installation Instructions for Power Modules.
Simplified Device Schematic
Absolute Maximum Ratings
Parameters
Value
Unit
Drain Voltage (V
DD
)
RF Input Power
35
V
+37
dBm
Load Impedance for Continuous Operation
Without Damage
5:1
VSWR
Control (Gate) Voltage, VDD = 0 VDC
15
V
Output Device Channel Temperature
+200
oC
Lead Temperature During Solder Reflow
+210
oC
Operating Temperature Range
-20 to +90
oC
Storage Temperature Range
-40 to +100
oC
Operation of this device beyond any one of these limits may
cause permanent damage. For reliable continuous operation see
typical setup values on the key specification table on the first
page of the datasheet.
Caution: ESD Sensitive
Appropriate precaution in handling, packaging
and testing devices must be observed.
Note 1:
Internal RF decoupling is included on all bias
leads. No additional bypass elements are
required, however some applications may
require energy storage on the drain leads to
accommodate time-varying waveforms.
Note 2:
Gate voltage must be applied coincident with or
after application of the drain voltage to prevent
potentially destructive oscillations. Bias volt-
ages should never be applied to a module
unless it is terminated on both input and output.
Note 3:
The VGS corresponding to a specific IDQ will
vary from module to module and may vary
between the two sides of a dual RF module by
as much as ±0.10 volts. This is due to the nor-
mal die-to-die variation in threshold voltage of
Note 4:
Since the gate bias of an LDMOS transistor
changes with device temperature, it may be nec-
essary to use a VGS supply with thermal com-
pensation if operation over a wide temperature
range is required.
Q1
Q2
Case Flange = Ground
1
2
3
4
5
6
7
8
9
10