參數(shù)資料
型號(hào): SDA9588X
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
元件分類: 畫(huà)面疊加
英文描述: Cost-effective Picture-In-Picture ICs
中文描述: PICTURE-IN-PICTURE IC, PDSO28
封裝: SOIC-28
文件頁(yè)數(shù): 45/87頁(yè)
文件大小: 2045K
代理商: SDA9588X
SDA 9488X
SDA 9588X
I2C Bus
Micronas
6-45
Preliminary Data Sheet
Subaddress 06h
Subaddress 07h
HSPINV
Horizontal Sync Pulse Inversion
D7
inverts the polarity of HSP
0
no inversion, raising edge is sync reference
1
HSP inverted, falling edge is sync reference
VSPINV
Vertical Sync Pulse Inversion
D6
inverts the polarity of VSP
0
no inversion, raising edge is sync reference
1
VSP inverted, falling edge is sync reference
VSPNSRQ
Vertical Sync Pulse Noise Reduction
D5
activates automatic V insertion that generates vertical sync pulses in
case of missing external VSP
0
on
1
off
VSPDEL
Vertical Sync Pulse Delay
D4
D3
D2
D1
D0
delay of the vertical sync pulse
in steps of 128 parent clocks
Note
0
0
0
0
0
no delay (0)
delay
depends on
HZOOM
...
1
1
1
1
1
maximum delay, 4096 clocks of
parent frequency
FRSEL
Frame Select
D7
selects between the normal frame and the shaded frame
0
normal frame
1
shaded frame with 3D impression
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