- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374749 > SDA9588X (MICRONAS SEMICONDUCTOR HOLDING AG) Cost-effective Picture-In-Picture ICs PDF資料下載
參數(shù)資料
| 型號(hào)： | SDA9588X |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 元件分類： | 畫面疊加 |
| 英文描述： | Cost-effective Picture-In-Picture ICs |
| 中文描述： | PICTURE-IN-PICTURE IC, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數(shù)： | 21/87頁 |
| 文件大?。?/td> | 2045K |
| 代理商： | SDA9588X |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當(dāng)前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁
SDA 9488X
SDA 9588X
System Description
Micronas
4-21
Preliminary Data Sheet
Table 4-10
Required number of lines for frame mode display
The system may be forced to field mode by means of
FIESEL.
Either first or second field
is selectable. ’One of both’ takes every second field independent of the field number.
This is meant for sources generating only one field (e.g. video-games).
For progressive scan conversion systems and HDTV / (S)VGA displays a line doubling
mode is available (
PROGEN
). Every line of the inset picture is read twice.
Memory writing is stopped by
FREEZE
bit. The field stored in the memory is then
continuously read. As the picture decimation is done before storing, the picture size of a
frozen picture can not be changed.
Depending on the phase between inset and parent signals a correction of the display
raster for the read out data is performed. Synchronization of memory reading with the
parent channel is achieved by processing the parent horizontal and vertical
synchronization signals. Horizontal and vertical pulses may be provided. The signals are
fed to the IC at pin HSP for horizontal synchronization and pin VSP for vertical
synchronization.
HSPINV
or
VSPINV
respectively allow an inversion of the
expected
signal polarity.
Figure 4-7
Field detection and phase adjustment of vertical pulse (VSP)
FMACTP
parent
standard
number of
lines per field
FMACTI
inset
standard
number of
lines per field
0
50 Hz
310...315
0
50 Hz
310...315
1
50 Hz
290...325
1
50 Hz
290...325
0
60 Hz
260...265
0
60 Hz
260...265
1
60 Hz
250...275
1
60 Hz
250...275
VSPDEL
VSPDEL
max
=151 (75)
←
s
values in brackets () apply for 100Hz systems
field 0 window
field 1 window
tH = 64 (32)
←
s
tH/2 = 32 (16)
←
s
HSP
VSP
VSPD
(internal)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SDA9489X | PIP IV Advanced SOPHISTICUS High-End Picture-In-Picture ICs |
| SDA9589X | PIP IV Advanced SOPHISTICUS High-End Picture-In-Picture ICs |
| SDB14 | 1.0 AMP. Schottky Barrier Rectifiers |
| SDB15 | 1.0 AMP. Schottky Barrier Rectifiers |
| SDB16 | 1.0 AMP. Schottky Barrier Rectifiers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SDA9589X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PIP IV Advanced SOPHISTICUS High-End Picture-In-Picture ICs |
| SDAB-15P | 制造商:HRS 制造商全稱:HRS 功能描述:STRAIGHT/METAL PCB D-SUB |
| SDAB-15P(55) | 制造商:Hirose Electric 功能描述:2.74mm 15 2 Zv^N ^Cv 39.14mm 350VAC 3A 5000M/500VDC 15m/100mA 1250VAC/1min. +85 -55 PBT/UL94V-0/ jbPbL+bL AWG#28 to #30 12.55mm Bulk |
| SDAB-15P05 | 制造商:HRS 制造商全稱:HRS 功能描述:STRAIGHT/METAL PCB D-SUB |
| SDAB-15S | 制造商:HRS 制造商全稱:HRS 功能描述:STRAIGHT/METAL PCB D-SUB |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。