參數(shù)資料
型號: SDA525X
廠商: SIEMENS AG
英文描述: ICs for Consumer Electronics
中文描述: 消費電子集成電路
文件頁數(shù): 17/143頁
文件大?。?/td> 1050K
代理商: SDA525X
SDA 525x
Semiconductor Group
17
1998-04-08
Acquisition Status Word
6.1.3
The acquisition dual port interface manages the VBI memory write access request from
the acquisition hardware and an asynchronous memory access request from the
microcontroller. The acquisition hardware delivers the address and data and then a
request to the interface. The access of acquisition hardware and controller is under a
special arbiter control. The end of data is indicated by the bit LIN24ST in SFR ACQSIR.
Memory Interface
TTX/VPS
FCER
FCOK
LIN.4
LIN.3
LIN.2
LIN.1
LIN.0
LIN.(4...0)
number of TV line in which data was received. This information
can be used to realize a “software data entry window”. 6
(4...0)
22
LIN.
FCOK
1 = Framing code OK (VPS or TTX). This bit is set always by
hardware, because lines with valid framing codes are
stored only. This bit is reset by software in VBI-buffer. If
reset, it indicates that this line was already processed.
FCER
1 = The framing code for TTX lines was accepted with 1-bit-
error. For VPS lines this bit has no meaning.
0 = For TTX lines the framing code E4
H
was detected.
TTX/VPS
1 = A valid TTX framing code was detected and the data-PLL
is locked to the TTX frequency.
0 = A valid VPS framing code was detected and the data-PLL
is locked to the VPS frequency.
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