參數(shù)資料
型號: SDA5254M
廠商: SIEMENS A G
元件分類: 圖文
英文描述: ICs for Consumer Electronics
中文描述: TELETEXT AND VPS/PDC DECODER, PQFP64
文件頁數(shù): 18/143頁
文件大?。?/td> 1050K
代理商: SDA5254M
SDA 525x
Semiconductor Group
18
1998-04-08
6.1.4
The following sections gives an overview about special function registers ACQMS_1,
ACQMS_2 and ACQSIR, with which slicer and acquisition can be controlled:
Acquisition Control Registers
Acquisition Mode and Status Register ACQMS_1
Acquisition Mode and Status Register ACQMS_2
Acquisition Mode and Status
Register
Default after reset: 00
(MSB)
0
0
ACQMS_1
SFR-Address C1
H
H
(LSB)
TTXE
VPSE
0
CRIC.1
CRIC.0
ENERT
TTXE
1:
enable TTX in lines 6 - 22
ENERT
1:
allow 1 bit error for TTX
CRIC.1 ... CRIC.0
00: The CRI is not included in FRC
01: last 2 bits of CRI are included in the FRC
10: last 4 bits of CRI are included in the FRC
11: last 8 bits of CRI are included in the FRC
VPSE
1:
enable VPS in line 16. Text-reception in this line is
automatically disabled
Comments
Bits 4, 6 and 7 are not defined, must be set to 0
Acquisition Mode and Status
Register
Default after reset: 00
(MSB)
TEST.7
TEST.6
ACQMS_2
SFR-Address C2
H
H
(LSB)
TEST.0
TEST.5
TEST.4
TEST.3
TEST.2
TEST.1
Comments
all bits have to be set to 0. Setting any of these bits will switch
on special slicer test modes for production test
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