參數(shù)資料
型號(hào)： SDA5254M
廠商： SIEMENS A G
元件分類： 圖文
英文描述： ICs for Consumer Electronics
中文描述： TELETEXT AND VPS/PDC DECODER, PQFP64
文件頁數(shù)： 62/143頁
文件大小： 1050K
代理商： SDA5254M
SDA 525x
Semiconductor Group
62
1998-04-08
6.3.3
External events and the real-time on-chip peripherals require CPU-service
asynchronous to the execution of any particular section of code. To couple the
asynchronous activities of these functions to normal program execution, a sophisticated
multiple-source, four-priority-level, nested interrupt system is provided. Interrupt
response delay ranges from 0,89
μ
s to 2.33
μ
s when using an 18-MHz clock (see
Chapter “Advanced Function Register” on page 115
).
Interrupt System
6.3.3.1
The processor acknowledges interrupt requests from seven sources: two from external
sources via the INT0 and INT1 pins, one from each of the two internal counters, one from
the serial I/O-port, one from teletext sync signals and one from the analog digital
converter. Each of the seven sources can be assigned to either of four priority levels and
can be independently enabled and disabled. Additionally, all enabled sources can be
globally disabled or enabled.
Interrupts result in a transfer of control to a new program location. Each interrupt vectors
to a separate location in program memory for its service program. The program servicing
the request begins at this address. The starting address (interrupt vector) of the interrupt
service program for each interrupt source is shown in the
Table 14
.
Interrupt Sources
Display Control Registers
Horizontal Delay
Vertical Delay
Transparent Control
Mode 1 Register
Mode 2 Register
Sync Interrupt Request Reg.
Language Control
Cursor Column Position
Cursor Row Position
Display Timing Control
Sandcastle Control
Display Mode
DHD
DVD
DTCR
DMODE1
DMODE2
TTXSIR
LANGC
DCCP
DCRP
DTIM
SCCON
DMOD
C3
C4
C5
C6
C7
C8
C9
CA
CB
CC
CE
D6
195
196
197
198
199
200
201
202
203
204
206
214
–
–
–
–
–
CF - C8
–
–
–
–
–
–
00
00
00
00
00
00
00
00
00
00
00
x0
Table 13
Special Function Register Overview
(cont’d)
Special Function Register
Description
Symbolic
Name
Address
Location
(hex.)
Address
Location
(dec.)
Bit Address
MSB … LSB
(hex.)
Initial
Value after
Reset
(hex./bin.)
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參數(shù)描述
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