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參數(shù)資料
| 型號： | SCG4500-155.52M |
| 廠商： | Connor-Winfield |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OSC CLK GEN 155.52MHZ OUT SMD |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 時鐘發(fā)生器 |
| PLL： | 是 |
| 輸入： | CMOS |
| 輸出： | LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:2 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 155.52MHz |
| 除法器/乘法器： | 無/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 18-SMD 模塊 |
| 包裝： | 管件 |
| 其它名稱： | CW641 SCG4500 155.52M SCG4500155.52M |
Preliminary Data Sheet #: SG026
Page 7 of 16
Rev: P08
Date: 10/08/02
Copyright 2002 The Connor-Winfield Corp.
All Rights Reserved Specifications subject to change without notice
Pin Description
Table 5
All SCG4500 Models
Pin #
Pin Name
Pin Information
Note
1
ENABLE/TRI-STATE
VCXO Enable. (Enable = 0, Disable = 1 = CMOS Outputs Tri-stated)
9.0
2
TCK
No Connection, Internal Factory Programming Input.
8.0
3
TDO
No Connection, Internal Factory Programming Input.
8.0
4
REF
A
CMOS Reference Frequency Input.
5
SEL
AB
Input Reference Select Pin. (REFA = 0, REFB = 1)
9.0
6
RESET
RESET. (RESET = 1)
9.0
7
REF
B
CMOS Reference Frequency Input.
8V
ee
Ground.
9FR
status
Free Run Status. (FR = 1)
10
V
cc
Supply Voltage relative to ground.
11
N/C
No Connection. (Optional Reference Output Available)
8.0, 8.1
12
ALARM
Loss of Reference / Lock alarm. (Alarm = 1)
13
FR
Force Free Run. (Phase Lock = 0, Free Run = 1)
9.0
14
TDI
No Connection, Internal Factory Programming Input.
8.0
15
TMS
No Connection, Internal Factory Programming Input.
8.0
16
QN
LVPECL Complementary Output.
17
V
ee
Ground.
18
Q
LVPECL Output.
Circuit Board Footprint & Keepout Recommendations
Figure 6
0.8400
[21.34 mm]
1.0400
[26.42 mm]
0.8650
[21.97 mm]
0.1000
[2.54 mm]
0.0350
[0.89 mm]
0.0650
[1.65 mm]
0.1000
[2.54 mm]
Keep Out
Area
1.0700
[27.18 mm]
NOTES
8.0
Do not connect pin
8.1
Contact a Sales Representative for availibilty
and use of optional reference output
9.0
Input pulled to ground
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