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16
2005 Semtech Corp.
www.semtech.com
SC4901
POWER MANAGEMENT
Application Information (Cont.)
Combi-Sync Topology
Combi-Sync is a unique secondary side topology that
overcomes most of the problems associated with
synchronous rectification of isolated outputs. It also
incorporates synchronous post regulation, making it the
ideal solution for low voltage, high current outputs.
Independently regulated multiple outputs can be derived
from a common transformer winding. The output stage
replaces the conventional rectifiers and regulators with
three MOSFETs, two of which switch at zero voltage. The
topology inherently eliminates turn on shoot through
without complicated timing or look ahead circuits to
maximise efficiency. All secondary switching circuits are
naturally synchronised to primary which simplifies noise
suppression. There are no separate synchronising, current
sensing or gate driving signals crossing the isolation
boundary. In most cases, there will be no need for a
separate bias supply on the secondary side further
simplifying the system design.
The primary side in a Combi-Sync circuit is a typical single
ended forward convertor which may be regulated or free
running. An additional benefit of the Combi-Sync topology
is the zero current turn on and turn off for the primary
MOSFET as well. The free running mode is preferred when
there are multiple outputs without minimum load and cross
regulation constraints. Input voltage feedforward is
recommended to achieve volt-second clamp and minimise
core losses in the free running mode.
Background on Synchronous Rectification and Post
Regulation
The synchronous rectifier technology is widely used in non
isolated DC-DC convertors but its use has been limited in
isolated convertors because of various difficulties. An
example of synchronous rectification on the secondary side
of a forward convertor is shown in Fig 9. DF and DR are
the parasitic body diodes of their respective FETs. The
forward MOSFET QF is turned ON when the transformer
secondary voltage goes positive and the rectifying MOSFET
QR is turned ON when the transformer secondary is
negative. Two approaches have been used to drive the
MOSFETs. One is the self driven scheme where the
transformer secondary itself provides the gate voltage for
the appropriate FET. While the scheme is simple and has
a very low cost, it has several limitations.
Fig 9) Isolated Synchronous Rectification
One is that QR can conduct synchronously only while the
transformer is being reset. Thereafter there is no gate
voltage to drive it and the circuit must employ diode.
Secondly since the gate voltages, and the peak of
transformer secondary, must be with 4.5V to 20V under
all conditions, the scheme may fail at lower voltage and
wide input ranges.
An alternative is to use a control driven approach where a
synchronous controller provides the gate drive. This
provides the low loss FET conduction over the entire cycle
and is not limited by output or input ranges. However it is
not without its own problems. At the instant transformer
voltage turns positive the body diode of QF gets forward
biased. At the same time, QR would also be fully conducting
and the result is a shorted winding just when the primary
switch is trying to turn ON. To prevent catastrophe it is
necessary to turn QR OFF
prior to transformer voltage going
positive
. This requires an advanced signal from the primary
side crossing the isolation boundary. Attempts have been
made to avoid this by complex timing or look ahead circuits
on the secondary side itself and several patents have been
issued for them.
It should be understood that all these techniques for
isolated synchronous rectification have been restricted to
a
single unregulated secondary output.
The existing
circuits only rectify the output but do not synchronously
regulate it any further. Nor is it possible to generate multiple
outputs from the same winding. Post regulation of the
isolated outputs has been implemented so far using either
the saturable magnetic inductor or a power MOSFET in
series with the forward diode. The saturable magnetic
element is bulky and inefficient at high frequencies. The
circuit with series MOSFET is widely known and well
documented. Fig 10) shows a standard implementation.
QR
QF
DF
DR