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參數(shù)資料
| 型號： | SC4901 |
| 廠商： | Semtech Corporation |
| 英文描述： | COMBI-SYNC Secondary Side Synchronous Rectifier and Regulator |
| 中文描述： | 客貨兩用，同步二次側(cè)同步整流和穩(wěn)壓器 |
| 文件頁數(shù)： | 11/20頁 |
| 文件大小： | 598K |
| 代理商： | SC4901 |
11
2005 Semtech Corp.
www.semtech.com
SC4901
POWER MANAGEMENT
Application Information (Cont.)
In all these cases OUTA and XFRA are turned off and, after
a fixed delay of 110 nS, the rectifier MOSFET is turned on.
Both OUTA and XFRA can sink or source + 2A peak current.
Since OUTA has to drive a level shifted MOSFET gate, it
must be used with a pulse transformer. Note that the
common source of the high side FETs presents a negative
voltage to the return pin of any high side drive circuit and
therefore a semiconductor driver is not recommended in
this application. Another pin called XFRA is provided to
simplify the gate drive design with a 1:1 transformer. The
XFRA is configured as a high current open collector
transistor and is turned on and off synchronously with
OUTA. If the maximum duty cycle expected is less than 50%,
the pulse transformer can be connected directly between
OUTA and XFRA. This ensures that the gate is always driven
with PVCC during both on and off periods. A 1A Schottky or
ultrafast rectifier should be connected in reverse across
the XFRA transistor. This is required to discharge the
MOSFET gate rapidly during turn off. Refer to DTO in Fig.
3a) In addition, a smaller signal diode should be connected
from XFRA to PVCC supply to reset the driver transformer.
This diode may be rated to carry the magnetising current
of the drive transformer. Refer DRES in Fig 3a) below.
If maximum duty ratio is more than 50% a ceramic
capacitor C RES may be added in series to the transformer
primary as shown in Fig 3b). The capacitor carries a small
voltage only when duty ratio is more than 50% which
correspondingly reduces the gate drive voltage during the
ON time.
Alternately an additional zener Z RES may be used to reset
the transformer during the OFF time as shown in Fig 3c).
The zener voltage V
Z
should be
V
Z
> PVCC x (2D -1 ) / (1-D) to reset the transformer
Note that in this arrangement the OFF voltage applied to
the MOSFET gates increases to ( PVCC + V
Z
).
Inside the SC4901, the drive circuits are powered by a
separate supply and ground pair, designated as PVCC and
PGND. Adequate and independent noise bypassing of both
AVCC and PVCC to the corresponding grounds is strongly
recommended.
Fig 3a. Driving a Pulse Transformer using XFRA and OUTA with < 50% duty ratio
PGND
DRES
DTO
RGS
OPTIONAL
RG
TRANSFORMER DESIGN
ON WHEN OUTA IS ON
BETWEEN OUTA AND XFRA
TIME.
OF QS AND QF
XFRA PIN IS PROVIDED TO
SIMPLIFY PULSE
XFRA IS AN OPEN
COLLECTOR THAT TURNS
FOR OPERATING DUTY
RATIOS OF 50% THE PULSE
TRANSFORMER IS
CONNECTED DIRECTLY
'DRES' RESETS THE PULSE
XFR DURING THE OFF
'DTO' PROVIDES A HIGH
CURRENT TURN OFF PATH
FOR THE GATE CHARGES
Sense
Current
QR
QF
CT
C
ZCD
15
CAO
3
CS-
2
CS+
1
OUTB
6
SSEN
4
XFRA
7
PVCC
9
PGND
8
VCC
5
GND
16
OUTA
10
REF
11
VEA-
12
VEA
13
RCT
14
P W M L O G I C
A N D
O U T P U T
D R I V E R S
TRANSFORMER
SECONDARY
SYNC AND RAMP
+
+
-
-
L
QS
DVCC
COUT
RZ
RT
PVCC
G
T
VSEC
RTN
VOUT
SC4901
CONVERTOR
SINGLE
ENDED
FORWARD
C SS
O
XFRA
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