參數(shù)資料
型號: SC488
廠商: Semtech Corporation
英文描述: Complete DDR1/2/3 Memory Power Supply
中文描述: 完全DDR1/2/3內(nèi)存供電
文件頁數(shù): 6/24頁
文件大?。?/td> 818K
代理商: SC488
6
2006 Semtech Corp.
www.semtech.com
POWER MANAGEMENT
Pin Con
fi
guration
SC488
Notes:
1) Only available in tape and reel packaging. A reel contains 3000 devices.
2) This product is fully WEEE and RoHS compliant.
Pin #
Pin Name
Pin Function
1
PGND2
Power ground for VTT output. Connect to thermal pad and ground plane.
2
VTTS
Sense pin for VTT. Connect to VTT at the load.
3
VSSA
Ground reference for analog circuitry. Connect to thermal pad.
4
TON
This pin is used to sense VBAT through a pull-up resistor, RTON, which sets the top MOSFET
on-time. Bypass this pin with a 1nF capacitor to VSSA.
5
REF
Reference output. An internal resistor divider from VDDQS sets this voltage to 50% VDDQ (nomi-
nal). Bypass this pin with a series 10
Ω/
1
μ
F to VSSA.
6
VCCA
Analog supply voltage input. Use a 10
Ω
/1
μ
F RC
fi
lter from +5V to VSSA.
7
NC
No connect.
8
VDDQS
Sense input for VDDQ. Used to set the on-time for the top MOSFET and also to set REF/VTT.
9
FB
Feedback select input for VDDQ. See FB Con
fi
guration Table.
10
VTTEN
Enable pin for VTT. Pull this pin low to disable VTT (REF remains present as long as VDDQ is
present).
11
EN/PSV
Enable/Power Save input pin. Tie to ground to disable VDDQ. Tie to +5V to enable VDDQ and
activate PSAVE mode. Float to enable VDDQ and activate continous conduction mode. If
fl
oated,
bypass to VSSA with a 10nF capacitor.
12
NC
No connect.
13
PGD
Power good output for VDDQ. PGD is low if VDDQ is outside the power good thresholds. This
pin is an open drain NMOS output and requires an external pull-up resistor.
Device
(2)
Package
(1)
SC488MLTRT
MLPQ-24
Pin Description
Ordering Information
PGND1
ILIM
PGND1
PGD
VDDP
VDDP
PGND2
VSSA
VTTS
VCCA
TON
REF
V
V
B
D
L
D
N
V
F
E
N
V
2
2
1
4
3
2
2
1
2
2
6
5
8
7
1
9
1
1
17
18
15
16
13
14
SC488
T
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