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17
2006 Semtech Corp.
www.semtech.com
SC486
POWER MANAGEMENT
Design Procedure (Cont.)
Secondly calculating the value of C
TOP
required to achieve
this:
F
f
2
R
1
Z
π
1
C
)
MIN
(
VBAT
_
SW
TOP
TOP
TOP
=
For our DDR2 VDDQ example we will use R
TOP
= 4.64k
and R
BOT
= 23.2k
, therefore
V
FB_VBAT(MIN)
= 16.7mV
P-P
- good
No additional capacitance is required, however a no-pop
space is recommended to allow for adjustment once the
design is complete, laid out and built.
Next we need to calculate the minimum output
capacitance required to ensure that the output voltage
does not exceed the transient maximum limit, POSLIM
,
starting from the actual static maximum, V
OUT_ST_POS
, when
a load release occurs:
V
ERR
V
V
DC
OUT
POS
_
ST
_
OUT
+
=
For our DDR2 VDDQ example:
V
OUT_ST_POS
= 1.836V
V
TOL
V
POSLIM
TR
OUT
TR
=
Where TOL
is the transient tolerance. For our DDR2
VDDQ example:
POSLIM
TR
= 1.900V
The minimum output capacitance is calculated as
follows:
(
POSLIM
)
F
V
2
I
I
L
C
2
POS
_
ST
_
OUT
2
TR
2
)
MAX
(
VBAT
_
RIPPLE
OUT
)
MIN
(
OUT
+
=
This calculation assumes the absolute worst case
condition of a full-load to no load step transient occurring
when the inductor current is at its highest. The
capacitance required for smaller transient steps my be
calculated by substituting the desired current for the I
OUT
term.
For our DDR2 VDDQ example:
C
OUT(MIN)
= 839μF.
We will select 440μF, using two 220μF, 15m
capacitors in parallel, which will be good for load release
steps of up to 6.7A.
Next we calculate the RMS input ripple current, which is
largest at the minimum battery voltage:
(
)
RMS
MIN
_
BAT
OUT
I
OUT
)
MIN
(
BAT
OUT
)
RMS
(
IN
I
A
V
V
V
V
=
For our DDR2 VDDQ example:
I
IN(RMS)
= 4A
RMS
Input capacitors should be selected with sufficient ripple
current rating for this RMS current, for example a 10μF,
1210 size, 25V ceramic capacitor can handle
approximately 3A
RMS
. Refer to manufacturer’s data
sheets.
Finally, we calculate the current limit resistor value. As
described in the current limit section, the current limit
looks at the “valley current”, which is the average output
current minus half the ripple current. We use the
maximum room temperature specification for MOSFET
R
DS(ON)
at V
GS
= 4.5V for purposes of this calculation:
A
2
I
I
I
)
MIN
(
VBAT
_
RIPPLE
OUT
VALLEY
=
The ripple at low battery voltage is used because we want
to make sure that current limit does not occur under
normal operating conditions.
(
)
Ohms
10
10
4
R
2
I
R
6
)
ON
(
DS
VALLEY
ILIM
=
For our DDR2 VDDQ example R
DS(ON)
= 9m
:
I
VALLEY
= 8.69A and R
ILIM
= 13.1k
We select the next lowest 1% resistor value: 13.0k