參數(shù)資料
型號(hào): SC471MLTRT
廠商: Semtech Corporation
英文描述: Synchronous Buck Controller with Multi-Level VOUT Transition Support
中文描述: 同步降壓控制器具有多層次VOUT電源支持過渡
文件頁數(shù): 18/27頁
文件大?。?/td> 634K
代理商: SC471MLTRT
18
2006 Semtech Corp.
SC471/SC471A
www.semtech.com
POWER MANAGEMENT
Applications Information
(continued)
The design goal is +/-4% output regulation. The internal
0.75V reference tolerance is 1%, assuming 1% tolerance
for the FB resistor divider, this allows 2% tolerance due to
VOUT ripple. Since this 2% error comes from 1/2 of the
ripple voltage, the allowable ripple is 4%, or 46mV for a
1.15V output.
The maximum ripple current of 4.05A creates a ripple
voltage across the ESR. The maximum ESR value allowed
would create 46mV ripple:
ESR
MAX
= V
RIPPLE
/I
RIPPLEMAX
= 46mV / 4.91A
ESR
MAX
= 9.4 m
Ω
The output capacitance is typically chosen based on
transient requirements. A worst-case load release, from
maximum load to no load at the exact moment when
inductor current is at the peak, de
fi
nes the required
capacitance. If the load release is instantaneous (load
changes from maximum to zero in a very small time), the
output capacitor must absorb all the inductor’s stored
energy. This will cause a peak voltage on the capacitor
according to the equation:
COUT
MIN
= L (I
OUT
+ 1/2 I
RIPPLEMAX
)
2
/ (V
PEAK
2
- V
OUT
2
)
With a peak voltage VPEAK of 1.230 (80mV rise above
1.15 upon load release), the required capacitance is:
COUT
MIN
= 0.7
μ
H(10 + 1/24.91)
2
/(1.24
2
- 1.15
2
)
COUT
MIN
= 570
μ
F
The above requirements (570
μ
F, 9.4m
Ω
) will be met using
two capacitors, 330
μ
F 6m
Ω
.
If the load release is relatively slow, the output capacitance
can be reduced. At heavy loads during normal switching,
when the FB pin is above the 0.75V reference, the DL
output is high and the low-side mosfet is on. During this
time, the voltage across the inductor is approximately
-VOUT. This causes a downslope or falling di/dt in the
inductor. If the load di/dt is not much faster than the
di/dt in the inductor, then the inductor current can track
change in load current, and there will be relatively less
overshoot from a load release.
The following can used to calculate the needed capacitance
for a given dILOAD/dt.
Peak inductor current,
ILPEAK = I
LOADMAX
+ 1/2 I
RIPPLEMAX
ILPEAK = 10 + 1/2 4.91 = 12.45A
Rate of change of Load current = dILOAD/dt
IMAX = maximum DC load current = 10A
COUT = ILPEAK (L ILPEAK / VOUT - IMAX/dILOAD /dt)
2 (VPEAK - VOUT)
Example: Load dI/dt = 2.5A/
μ
sec
This would cause the output current to move from 10A to
zero in 4
μ
sec.
COUT = 12.45(0.7
μ
H12.45/1.15 - 10/(2.5/1
μ
sec)
2 (1.23 - 1.15)
COUT = 278
μ
F
Stability Considerations
Unstable operation shows up in two related but distinctly
different ways: double-pulsing and fast-feedback loop
instability. double-pulsing occurs due to switching noise
seen at the FB input or because the ESR is too low, causing
insuf
fi
cient voltage ramp in the FB signal. This causes
the error ampli
fi
er to trigger prematurely after the 350ns
minimum off-time has expired. double-pulsing will result
in higher ripple voltage at the output, but in most cases
is harmless. In some cases, however, double-pulsing can
indicate the presence of loop instability, which is caused
by insuf
fi
cient ESR.
One simple way to solve this problem is to add some trace
resistance in the high current output path. A side effect
of doing this is output voltage droop with load. Another
way to eliminate doubling-pulsing is to add a small (e.g.
10pF) capacitor across the upper feedback resistor
divider network, (this capacitor is shown in Figure 14).
This capacitance should be left out until con
fi
rmation that
double-pulsing exists. Adding this capacitance will add
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