參數(shù)資料
型號: SC471MLTRT
廠商: Semtech Corporation
英文描述: Synchronous Buck Controller with Multi-Level VOUT Transition Support
中文描述: 同步降壓控制器具有多層次VOUT電源支持過渡
文件頁數(shù): 12/27頁
文件大?。?/td> 634K
代理商: SC471MLTRT
12
2006 Semtech Corp.
SC471/SC471A
www.semtech.com
POWER MANAGEMENT
Applications Information
(continued)
For the case where the down transition is less than
8%, and the load is light such that power-save is active,
the Smart Power Save detector will not activate. In this
case, with FB already above the 0.75V reference there
is no switching activity. DL and DH will remain off, and
the output voltage will slowly fall as the output capacitors
discharge into the load, see Figure 6.
Note: at light loads it can take many msec for the output to fall
to the new value. This should have no adverse effect. Many
loads such as graphics chipsets can have a minimum load of
several hundred mA, which will naturally pull VOUT down to the
next level.
V
OUT
FB
R1
R2
D0/D1
D0/D1
RTN
< 810mV
(FB threshold)
FB
COUT Discharge due to load
Initial
VOUT
Final
VOUT
VOUT
R3/R4
(Smart Psave threshold)
Figure 6
The time needed to reach the
fi
nal voltage is found from
the following equation, where COUT is in
μ
F, and LOAD is
in Amps:
Note: the preceding equation applies only to the condition
where the VOUT downward change is less that the 8% limit
for Smart Psave, and also the load is light such that Psave is
active.
Time (
μ
sec) = C
OUT
* (V
INITIAL
– V
FINAL
)/LOAD
When doing an up transition (from lower to higher VOUT),
the G0/G1 change will affect D0/D1 and cause FB to drop
below the 0.75V internal reference. This quickly trips the
FB comparator regardless of whether psave is active or
not, generating a DH on-time and a subsequent DL high
time. At the end of the minimum off-time (350nsec), if FB
is still below 0.75V then another DH on-time is started,
Figure 7. This continues until FB reaches the normal
operating point.
V
OUT
FB
R1
R2
D0/D1
D0/D1
RTN
750mV
(FB threshold)
FB
DH
DL
VOUT
Final
VOUT
Initial
VOUT
R3/R4
Figure 7
If the VOUT change is signi
fi
cant, there can be several
consecutive cycles of DH on-time followed by minimum DL
time. This can cause a rapid increase in inductor current:
typically it only takes a few switching cycles for the induc-
tor current to rise up to the Current Limit. At some point
the FB voltage will rise up to the 0.75V reference and the
DH pulses will cease, but the inductor’s LI
2
energy must
then
fl
ow into the output cap. This can create a signi
fi
cant
overshoot as shown in Figure 8.
相關PDF資料
PDF描述
SC471 Synchronous Buck Controller with Multi-Level VOUT Transition Support
SC471A Synchronous Buck Controller with Multi-Level VOUT Transition Support
SC471AMLTRT Synchronous Buck Controller with Multi-Level VOUT Transition Support
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