參數(shù)資料
型號(hào): SC16C850IET,115
廠(chǎng)商: NXP Semiconductors
文件頁(yè)數(shù): 21/55頁(yè)
文件大?。?/td> 0K
描述: IC UART SINGLE W/FIFO 36-TFBGA
標(biāo)準(zhǔn)包裝: 1,000
特點(diǎn): 可編程
通道數(shù): 1,UART
FIFO's: 128 字節(jié)
規(guī)程: RS485
電源電壓: 2.5 V ~ 3.3 V
帶自動(dòng)流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動(dòng)位檢測(cè)功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類(lèi)型: 表面貼裝
封裝/外殼: 36-TFBGA
供應(yīng)商設(shè)備封裝: 36-TFBGA(3.5x3.5)
包裝: 帶卷 (TR)
其它名稱(chēng): 935284685115
SC16C850IET-G
SC16C850IET-G-ND
SC16C850
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 11 November 2010
28 of 55
NXP Semiconductors
SC16C850
2.5 to 3.3 V UART with 128-byte FIFOs and IrDA encoder/decoder
7.6 Modem Control Register (MCR)
This register controls the interface with the modem or a peripheral device.
Table 18.
LCR[1:0] word length
LCR[1]
LCR[0]
Word length (bits)
00
5
01
6
10
7
11
8
Table 19.
Modem Control Register bits description
Bit
Symbol
Description
7
MCR[7]
Clock select
logic 0 = divide-by-1 clock input
logic 1 = divide-by-4 clock input
6
MCR[6]
IR enable (see Figure 22).
logic 0 = enable the standard modem receive and transmit input/output
interface (normal default condition)
logic 1 = enable infrared IrDA receive and transmit inputs/outputs. While
in this mode, the TX/RX output/inputs are routed to the infrared
encoder/decoder. The data input and output levels will conform to the
IrDA infrared interface requirement. As such, while in this mode, the
infrared TX output will be a logic 0 during idle data conditions.
5
MCR[5]
Interrupt type (Intel mode only). In Intel mode (16/68 = 1), this pin
determines the interrupt output pin configuration.
logic 0 = CMOS output
logic 1 = open-source. A 300
Ω to 500 Ω pull-down resistor is required.
In Motorola mode (16/68 = 0), the output is always open-drain.
4
MCR[4]
Loopback. Enable the local loopback mode (diagnostics). In this mode the
transmitter output (TX) and the receiver input (RX), CTS, DSR, CD, and RI
are disconnected from the SC16C850 I/O pins. Internally the modem data
and control pins are connected into a loopback data configuration (see
Figure 9). In this mode, the receiver and transmitter interrupts remain fully
operational. The Modem Control Interrupts are also operational, but the
interrupts’ sources are switched to the lower four bits of the Modem Control.
Interrupts continue to be controlled by the IER register.
logic 0 = disable Loopback mode (normal default condition)
logic 1 = enable local Loopback mode (diagnostics)
3MCR[3]
OP2. This bit is used for internal Loopback mode only. In Loopback mode,
this bit is used to write the state of the modem CD interface signal.
2MCR[2]
OP1. This bit is used for internal Loopback mode only. In Loopback mode,
this bit is used to write the state of the modem RI interface signal.
1MCR[1]
RTS
logic 0 = force RTS output to a logic 1 (normal default condition)
logic 1 = force RTS output to a logic 0
0MCR[0]
DTR
logic 0 = force DTR output to a logic 1 (normal default condition)
logic 1 = force DTR output to a logic 0
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