參數(shù)資料
型號： SC16C550BIN40
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs
中文描述： 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PDIP40
封裝： 0.600 INCH, PLASTIC, MO-015, SOT-129-1, DIP-40
文件頁數(shù)： 23/47頁
文件大?。?/td> 229K
代理商： SC16C550BIN40
Philips Semiconductors
SC16C550B
5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs
Product data
Rev. 02 — 14 December 2004
23 of 47
9397 750 14446
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
7.4 Interrupt Status Register (ISR)
The SC16C550B provides four levels of prioritized interrupts to minimize external
software interaction. The Interrupt Status Register (ISR) provides the user with four
interrupt status bits. Performing a read cycle on the ISR will provide the user with the
highest pending interrupt level to be serviced. No other interrupts are acknowledged
until the pending interrupt is serviced. Whenever the interrupt status register is read,
the interrupt status is cleared. However, it should be noted that only the current
pending interrupt is cleared by the read. A lower level interrupt may be seen after
re-reading the interrupt status bits.
Table 13 “Interrupt source”
shows the data values
(bits 0-3) for the four prioritized interrupt levels and the interrupt sources associated
with each of these interrupt levels.
Table 13:
Priority
level
1
2
2
3
4
Interrupt source
ISR[3]
ISR[2]
ISR[1]
ISR[0]
Source of the interrupt
0
0
1
0
0
1
1
1
0
0
1
0
0
1
0
0
0
0
0
0
LSR (Receiver Line Status Register)
RXRDY (Received Data Ready)
RXRDY (Receive Data time-out)
TXRDY (Transmitter Holding Register Empty)
MSR (Modem Status Register)
Table 14:
Bit
7:6
Interrupt Status Register bits description
Symbol
Description
ISR[7:6]
FIFOs enabled. These bits are set to a logic 0 when the FIFO is
not being used. They are set to a logic 1 when the FIFOs are
enabled.
Logic 0 or cleared = default condition.
ISR[5:4]
Not used.
ISR[3:1]
INT priority bits 2-0. These bits indicate the source for a pending
interrupt at interrupt priority levels 1, 2, and 3 (see
Table 13
).
Logic 0 or cleared = default condition.
ISR[0]
INT status.
Logic 0 = An interrupt is pending and the ISR contents may be
used as a pointer to the appropriate interrupt service routine.
Logic 1 = No interrupt pending (normal default condition).
5:4
3:1
0
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SC16C550BIN40,112 功能描述:UART 接口集成電路 16CB 2.5V-5V 1CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C550IA44 制造商:NXP Semiconductors 功能描述:UART 16BYTE FIFO 16C550 PLCC44
SC16C550IA44,512 功能描述:UART 接口集成電路 16C 2.5V-5V 1CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C550IA44,518 功能描述:UART 接口集成電路 16C 2.5V-5V 1CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C550IA44,529 功能描述:UART 接口集成電路 16C 2.5V-5V 1CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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