參數(shù)資料
型號(hào)： SAB83C517A-5N18-T3
文件頁數(shù)： 25/77頁
文件大?。?/td> 1358K
代理商： SAB83C517A-5N18-T3
S
S
2
1
Table 1:
Behaviour of P0/P2 and
during MOVX accesses
RD WR
00
10
X1
DPTR < XRAM
address
range
MOVX
@Ri
MOVX
@DPTR
a) P0/P2
Y
Bus
b)
c) ext. memory is
used
active
RD WR
a) P0/P2
Y
Bus
b)
c) ext. memory is
used
active
RD WR
a) P0/P2
Y
Bus
b)
c) ext. memory is
used
active
RD WR
a) P0/P2
Y
Bus
b)
c) ext. memory is
used
active
RD WR
a) P0/P2
Y
Bus
b)
c) ext. memory is
used
active
RD WR
a) P0/P2
Y
Bus
b)
c) ext. memory is
used
active
RD WR
a) P0/P2
Y
Bus
b)
c) ext. memory is
used
active
RD WR
a) P0/P2
Y
Bus
b)
c) ext. memory is
used
active
RD WR
modes compatible to 8051 - family
00
10
X1
XMAP1, XMAP0
= 0
EA
a) P0/P2
Y
BUS
(
b)
c) XRAM is used
-Data only)
RD WR
inactive
WR
a) P0/P2
Y
BUS
(
b)
c) XRAM is used
-Data only)
RD WR
active
WR
a) P0/P2
Y
I/0
b)
c) XRAM is used
inactive
RD WR
a) P0/P2
Y
BUS
(
b)
c) XRAM is used
-Data only)
RD WR
active
WR
a) P0/P2
Y
BUS
(
P2
Y
I/0
b)
c) XRAM is used
-Data only)
inactive
WR
RD WR
a) P0/P2
Y
BUS
(
P2
Y
I/0
b)
c) XRAM is used
-Data only)
active
WR
RD WR
a) P0
Y
Bus
P2
Y
I/0
b)
c) ext. memory is
used
active
RD WR
a) P0/P2
Y
I/0
b)
c) XRAM is used
inactive
RD WR
a) P0
Y
BUS
(
P2
Y
I/0
b)
c) XRAM is used
-Data only)
active
WR
RD WR
a) P0
Y
Bus
P2
Y
I/0
b)
c) ext. memory is
used
active
RD WR
a) P0
Y
Bus
P2
Y
I/0
b)
c) ext. memory is
used
active
RD WR
a) P0
Y
Bus
P2
Y
I/0
b)
c) ext. memory is
used
active
RD WR
a) P0
Y
Bus
P2
Y
I/0
b)
c) ext. memory is
used
active
RD WR
a) P0
Y
Bus
P2
Y
I/0
b)
c) ext. memory is
used
active
RD WR
a) P0
Y
Bus
P2
Y
I/0
b)
c) ext. memory is
used
active
RD WR
DPTR
≥
XRAM
address
range
XPAGE < XRAM
addr. page
range
XPAGE
≥
XRAM
addr. page
range
XMAP1, XMAP0
= 1
EA
a) P0
Y
Bus
P2
Y
I/0
b)
c) ext. memory is
used
active
RD WR
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAB83C517A-5N18-T4 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8-Bit CMOS Single-Chip Microcontroller
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