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Semiconductor Group
27
C504
The A/D converter uses two clock signals for operation : the conversion clock f
ADC
(= 1/ t
ADC
) and
the input clock f
IN
(= 1/ t
IN
). Both clock signals are derived from the C504 system clock f
OSC
which
is applied at the XTAL pins. The duration of an A/D conversion is a multiple of the period of the f
IN
clock signal. The table in
figure 10
shows the prescaler ratios and the resulting A/D conversion
times which must be selected for typical system clock rates.
Figure 10
A/D Converter Clock Selection
The analog inputs are located at port 1 and port 3 (4 lines on each port). The corresponding port 1
and port 3 pins have a port structure, which allows to use it either as digital I/Os or analog inputs.
The analog input function of these mixed digital/analog port lines is selected via the registers
P1ANA and P3ANA.
MCU System Clock
Rate (f
OSC
)
f
IN
[MHz]
Prescaler
f
ADC
[MHz]
A/D Conversion
Time [
μ
s]
Ratio
÷
4
÷
4
÷
4
÷
8
÷
8
÷
16
ADCL1
ADCL0
3.5 MHz
1.75
0
0
.438
48 x t
IN
= 27.4
48 x t
IN
= 8
48 x t
IN
= 6
96 x t
IN
= 8
96 x t
IN
= 6
192 x t
IN
= 9.6
12 MHz
6
0
0
1.5
16 MHz
8
0
0
2
24 MHz
12
0
1
1.5
32 MHz
16
0
1
2
40 MHz
20
1
0
1.25
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