參數(shù)資料
型號: SAB-C165-R25M
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 14 MHz, MICROCONTROLLER, PQFP100
封裝: EIAJ, MQFP-100
文件頁數(shù): 8/18頁
文件大?。?/td> 306K
代理商: SAB-C165-R25M
11Jul97@13:32h Intermediate Version
Semiconductor Group
14
C165 / 3 V
Data hold after WR
t
24
CC 26 +
t
F
TCL - 10
+
tF
–ns
ALE rising edge after RD,
WR
t
26
CC -10 +
t
F
–-10
+
t
F
–ns
Address hold after WR 2)
t28
CC 0 +
tF
–0
+
t
F
–ns
ALE falling edge to CS
t38
CC -5 -
tA
20 -
tA
*)
-5 -
tA
20 -
tA
*)
ns
CS low to Valid Data In
t
39
SR –
72
+
tC + 2tA
3TCL - 35
+
tC+2tA
ns
CS hold after RD, WR
t
41
CC 16 +
t
F
TCL - 20
+
t
F
–ns
ALE falling edge to RdCS,
WrCS (with RW-delay)
t42
CC 31 +
tA
TCL - 5
+
t
A
–ns
ALE falling edge to RdCS,
WrCS (no RW-delay)
t43
CC -5 +
tA
–-5
+
t
A
–ns
RdCS to Valid Data In
(with RW-delay)
t46
SR –
42 +
tC
2TCL - 30
+
t
C
ns
RdCS to Valid Data In
(no RW-delay)
t
47
SR –
77 +
t
C
3TCL - 30
+
t
C
ns
RdCS, WrCS Low Time
(with RW-delay)
t
48
CC 56 +
t
C
2TCL - 15
+
t
C
–ns
RdCS, WrCS Low Time
(no RW-delay)
t
49
CC 92 +
t
C
3TCL - 15
+
t
C
–ns
Data valid to WrCS
t
50
CC 46 +
t
C
2TCL - 25
+
t
C
–ns
Data hold after RdCS
t
51
SR 0
0–ns
Data float after RdCS
(with RW-delay)
t
53
SR –
51 +
t
F
2TCL - 20
+
t
F
ns
Data float after RdCS
(no RW-delay)
t
68
SR –
16 +
t
F
TCL - 20
+
t
F
ns
Address hold after
RdCS, WrCS
t
55
CC -5 +
t
F
–-5
+
t
F
–ns
Data hold after WrCS
t
57
CC 21 +
t
F
TCL - 15
+
tF
–ns
Parameter
Symbol
Max. CPU Clock
= 14 MHz
(0 to 70 °C)
Variable CPU Clock
1/2TCL=1..14 MHz, 0..70 °C
1/2TCL=1..12 MHz, -40..85°C
Unit
min.
max.
min.
max.
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