參數(shù)資料
型號: SAA8116ET
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: Digital PC-camera signal processor including microcontroller and USB interface
中文描述: SPECIALTY CONSUMER CIRCUIT, PBGA112
封裝: 7 X 7 MM, 0.80 MM HEIGHT, PLASTIC, MO-195, SOT-630-1, TFBGA-112
文件頁數(shù): 39/60頁
文件大?。?/td> 237K
代理商: SAA8116ET
2001 May 04
39
Philips Semiconductors
Product specification
Digital PC-camera signal processor including
microcontroller and USB interface
SAA8116
Table 41
Register PIN_CONFIG_0 (address: 0x7EH)
Table 42
Register PIN_CONFIG_1 (address: 0x7FH)
BIT
PARAMETER
7
6
5
4
3
2
1
0
X
X
X
X
X
X
reserved
P4_SEL: when enabled; pins are configured as general purpose outputs; otherwise
they are connected to FV1; FV2 and FV3
disabled
enabled (by default)
ROG_SEL: select ROG signal according to CCD type
PPG output ROG1 (Sony and Sharp CCD application) (by default)
PPG output ROG2 (Panasonic CCD application)
0
1
0
1
BIT
PARAMETER
7
6
5
4
3
2
1
0
PR_DISABLE: control remote wake-up 2
enabled
disabled (by default)
SR_DISABLE: control remote wake-up 1
enabled
disabled (by default)
SPIF_SEL: select interface between sensor and preprocessor
use serial interface (by default)
use port P4[2 to 0]
ASCLK_SEL: select ASCLK clock
ASCLK = single pixel clock (by default)
ASCLK = double pixel clock
VSP_VH_SEL: select connection type of VSP pins V and H
V = external V pulse (input); H = PPG_HD (output); VSP_VIN = PPG_VD
V = external V pulse (input); H = VSP_HOUT (output);
VSP_VIN = external V pulse
V = PPG_VD (output); H = PPG_HD (output); VSP_VIN = PPG_VD
V= VSP_VOUT (output); H = VSP_HOUT (output); VSP_VIN = 0
PCLK_INV: control pixel clock
normal (by default)
inverted
VSP_CLK_SEL: select VSP clock
VSP_CLK = CLK1 from PPG (by default)
VSP_CLK = PCLK
0
1
0
1
0
1
0
1
0
0
0
1
1
1
0
1
0
1
0
1
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