參數(shù)資料
型號(hào)： SAA7826HL
廠商： NXP Semiconductors N.V.
元件分類(lèi)： DRAM
英文描述： CD audio decoder, digital servo and filterless DAC with integrated pre-amp and laser control
封裝： SAA7826HL/M1AS/S5<SOT315-1 (LQFP80)|<<http://www.nxp.com/packages/SOT315-1.html<1<Always Pb-free,;
文件頁(yè)數(shù)： 21/89頁(yè)
文件大小： 379K
代理商： SAA7826HL
2003 Oct 01
21
Philips Semiconductors
Product specification
CD audio decoder, digital servo and filterless
DAC with integrated pre-amp and laser control
SAA7826
7.10.1.1
Use of internal DAC
Setting shadow register 7 to 0010 routes audio data from
the decoder into the internal DAC. To enable the on-board
DAC, the DAC interface format (set by register 3) must be
set to 16-bit 1f
s
mode, either I
2
S-bus or EIAJ format.
CD-ROM mode can also be used if interpolation is not
required. The serial data output pins for interfacing with an
external DAC (SCLK, WCLK, DATA and EF) are set to
high-impedance.
7.10.1.2
Loopback external data into onboard DAC
The onboard DAC can also be set to accept serial data
inputs from an external source, e.g. an Electronic Shock
Absorption(ESA) IC.Thisisknownasloopbackmodeand
is enabled by setting shadow register 7 to 0000. This
enables the serial data output pins (SCLK, WCLK, DATA
and EF) so that data can be routed from the SAA7826 to
an external ESA system (or external DAC).
The serial data from an external ESA IC can then also be
input to the onboard DAC on the SAA7826 by utilising the
serial data input interface (SCLI, SDI and WCLI).
In this mode, a wide range of data formats to the external
ESA IC can be programmed as shown in Table 7.
However, the serial input on the SAA7826 always expects
the input data from the ESA IC to be 16-bit 1fs and the
same data format, either I2S-bus or EIAJ, as the serial
output format (set by decoder register 3).
7.10.2
E
XTERNAL
DAC
INTERFACE
Audio data from the SAA7826 can be sent to an external
DAC, identical to the SAA732x series, in ‘loopback’ mode
(i.e. shadow register 7 is set to 0000).
The SAA7826 is compatible with a wide range of external
DACs. Eleven formats are supported which are given in
Table 7. Figures 14 and 15 show the Philips I
2
S-bus and
the EIAJ data formats respectively. When the decoder is
operated in lock-to-disc mode, the SCLK frequency
depends on the disc speed factor ‘d’.
All formats are MSB first and 1f
s
is 44.1 kHz. The polarity
of the WCLK and the data can be inverted; selectable by
decoder register 7. It should be noted that EF is only a
defined output in CD-ROM and 1f
s
modes.
When using an external DAC (or when using the onboard
DAC in non-loopback mode), the serial data inputs to the
onboard DAC (SCLI, SDI and WCLI) should be tied to
ground.
Table 7
DAC interface formats
Note
1.
In this mode the first 16 bits contain data, but if any of the fade, attenuate or de-emphasis filter functions are activated
then the first 18 bits contain data.
REGISTER 3
SAMPLE
FREQUENCY
NUMBER OF
BITS
SCLK (MHz)
FORMAT
INTERPOLATION
1010
f
s
16
2.1168
×
n
CD-ROM
(I
2
S-bus)
CD-ROM (EIAJ)
Philips I
2
S-bus
16/18 bits
(1)
EIAJ 16 bits
EIAJ 18 bits
EIAJ 16 bits
EIAJ 18 bits
Philips I
2
S-bus
18 bits
EIAJ 16 bits
EIAJ 18 bits
Philips I
2
S-bus
18 bits
no
1011
1110
f
s
f
s
16
2.1168
×
n
2.1168
×
n
no
yes
16/18
(1)
0010
0110
0000
0100
1100
f
s
f
s
4f
s
4f
s
4f
s
16
18
16
18
18
2.1168
×
n
2.1168
×
n
8.4672
×
n
8.4672
×
n
8.4672
×
n
yes
yes
yes
yes
yes
0011
0111
1111
2f
s
2f
s
2f
s
16
18
18
4.2336
×
n
4.2336
×
n
4.2336
×
n
yes
yes
yes
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