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1997 May 30
18
Philips Semiconductors
Preliminary specification
Car radio Digital Signal Processor (CDSP)
SAA7707H
9.4
Power-on mute
To avoid any uncontrolled noise at the audio outputs after
Power-on of the IC, the reference current source of the
DAC is switched off. The capacitor connected to pin 21
(POM) determines the time after which this current has a
soft switch-on. Consequently, at Power-on, the current
audio signal outputs are always muted. The voltage output
signals will show a small jump at switch-on due to the
asymmetrical voltage supply of the output operational
amplifiers. These types of disturbances must be
eliminated via the application set-up. The output has to be
set to digital silence before the POM pin is at logic HIGH.
This is achieved via the DSP program control and/or a zero
volume setting. The pin is internally connected to V
DDO
with a high-ohmic resistor.
9.5
Power-off plop suppression
To avoid plops in a power amplifier, the supply voltage of
the analog part of the DAC can be fed via a Schottky diode
and an extra capacitor. In this situation, the output voltage
will decrease gradually, allowing the power amplifier some
extra time to switch off without audible plops.
9.6
Internal reference buffer amplifier of the DAC
(pin V
ref
)
Using two internal resistors, half of the supply voltage
(V
DDO
) is obtained and coupled to an internal buffer.
This reference voltage is used as a DC voltage for the
output operational amplifiers and as a reference voltage
for the DAC. In order to obtain the lowest noise and to have
the best ripple rejection, a filter capacitor has to be added
between this pin and ground.
9.7
Internal DAC current reference
As a reference for the current at the DAC current source,
a current is drawn from pin 13 (I
ref(int)
) to the V
SSO
ground.
The voltage at this pin is
1
2
V
DDO
(typically 2.5 V).
The maximum DAC current is equal to 4.5 times this
current. When a reference resistor of 18 k
is used, the
reference current from the DAC is 125
μ
A. This results in
a peak current from the four current outputs of
4.5
×
125 = 562.5
μ
A.
9.8
Analog outputs supply
For an optimum signal-to-noise performance, supply ripple
rejection and to suppress switch-off plops, the output
operational amplifiers, the analog part of the DACs and the
upsample filter plus digital part have separate power
supply connections.
The operational amplifiers have the V
SSO
and V
DDO
pins
as ground and positive supply. These pins also provide the
supply for the reference circuits. The analog DAC part
uses the V
SSA
and V
DDA
pins as ground and positive
supply. The upsample filter and digital part of the DAC
share the V
SSD1
and V
DDD1
as ground and positive supply
connections.
9.9
Clock circuit and oscillator
The SAA7707H has an on-board crystal clock oscillator.
The schematic of this Pierce oscillator is illustrated in
Fig.11. The active element needed to compensate for the
loss resistance of the crystal is the block ‘Gm’. This block
is placed between the XTAL (output) and the OSC (sense)
pins. The gain of the oscillator is internally controlled by the
AGC block; this prevents excessive power loss in the
crystal. The higher harmonics are then as low as possible.
The signal on the XTAL pin is amplified and divided by two.
This 18.43 MHz signal is then used as the DSP clock
signal (PH2). For the high frequency, as used in the
SAA7707H, normally only third overtone crystals are
available. With an external LC notch filter at the
fundamental frequency, oscillation at this frequency can
be avoided.The crystal frequency is chosen in such a way
that the harmonics are outside the normal FM band.
The crystal frequency used is 36.86 MHz.
9.10
Crystal oscillator supply
The power supply connections for the oscillator are
separate from the other supply lines. This is to minimize
the feedback from the ground bounce of the chip to the
oscillator circuit. The V
SSX
pin (pin 66) is used as ground
supply and the V
DDX
pin (pin 65) as positive supply.
9.11
External control pins
For external control, two input pins have been
implemented. The status of these pins can be changed by
applying a logic level, and is recorded in the internal status
register. The functions of each pin are as follows:
MUTE (pin 44). Mute input (0 = MUTE)
DEEM (pin 45). This pin activates the de-emphasis for
CD and DCC. (1 = de-emphasis on).
To control external devices, two output pins are
implemented. The status of these pins is controlled by the
DSP program. The functions of each pin are as follows: