參數(shù)資料
型號(hào): SAA7388
廠商: NXP Semiconductors N.V.
英文描述: Error correction and host interface IC for CD-ROM ELM
中文描述: 錯(cuò)誤更正和主機(jī)接口集成電路的CD - ROM榆木
文件頁(yè)數(shù): 11/60頁(yè)
文件大?。?/td> 226K
代理商: SAA7388
1996 Apr 26
11
Philips Semiconductors
Preliminary specification
Error correction and host interface IC for
CD-ROM (ELM)
SAA7388
Table 1
Sub-CPU registers during write
#
AR
NAME
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
0
00000
ADATA/
SBOUT
IFCTRL
DBCL
DBCH
DACL
DACH
DTRG
DTACK
WAL
WAH
CTRL0
CTRL1
PTL
PTH
ATAPI Data register/Status Byte Output register
1
2
3
4
5
6
7
8
9
00001
00010
00011
00100
00101
00110
00111
01000
01001
CMDIEN
DTEIEN
DECIEN
Data Byte Count register bits 7 to 0
Data Byte Count register bits 15 to 8
Data Address Counter register bits 7 to 0
Data Address Counter register bits 15 to 8
Data Transfer Trigger register
Data Transfer Acknowledge register
Write Address register bits 7 to 0
Write Address register bits 15 to 8
E01RQ
AUTOQ
DSCREN COWREN
Block Pointer register bits 7 to 0
Block Pointer register bits 15 to 8
CMDBK
DTWAI
STWAI
DOUTEN
SOUTEN
10 01010
11
01011
12 01100
13 01101
14
01110
15
01111
16 10000
17 10001
18 10010
19 10011
20 10100
21 10101
22 10110
23
10111
24 11000
25 11001
26 11010
27
11011
28
11100
29
11101
30
11110
31
11111
DECEN
SYIEN
lookahead
SYDEN
ERAMRQ
MODRQ
WRRQ
FORMRQ MBCKRQ SHDREN
ECCRQ
ENCODE
RESET
DACHH
WAHH
PTHH
SUB_L
SUB_H
reserved
HSEL
mem
Data Address Counter register bits 20 to 16
Write Address register bits 20 to 16
Block Pointer register bits 20 to 16
Subcode Address register bits 7 to 0
Subcode Address register bits 9 and 8
INCNF
MEMS
ASTAT
ITRG
ADRADR
ASAMT
DTCTR
ADRSEL
AINTR
AERR
IISmode
0
div 1
div 0
QWmode
0
ATAPI Status register
Host Interrupt Trigger register
ATAPI Drive Address register
ATAPI SAM TAG register
UDMA
SUBIEN
ATAPI Drive Select register
ATAPI Interrupt Reason register
ATAPI Error register
QWon
RFRSH
QWcook
WIDTH
RAM test
STATIC
0
PRIORITY
CACHE
res.
DMAMODE
RDRV
TRANT
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