參數(shù)資料
型號： SAA2022
廠商： NXP Semiconductors N.V.
英文描述： Tape formatting and error correction for the DCC system
中文描述： 磁帶格式和糾錯的數(shù)控系統(tǒng)
文件頁數(shù)： 45/52頁
文件大?。?/td> 208K
代理商： SAA2022
February 1994
45
Philips Semiconductors
Product specification
Tape formatting and error
correction for the DCC system
SAA2022
Outputs A0 to A8, AZCHK, TEST2, LTREF, SBDIR, SBEF, SPDF, SPEED, PINO1 to PINO3, URDA, WCLOCK,
WDATA, OEN and WEN
t
dMR
delay time from MCLK
note 2
30
ns
Outputs OEN and WEN
t
d
delay time from PWRDWN
15
ns
Output RASN
t
dFR
delay time from CLK24
note 1
30
ns
t
d
delay time from PWRDWN
15
ns
Output CASN
t
dFR
delay time from CLK24
note 1
30
ns
t
d
delay time from PWRDWN
15
ns
Inputs/outputs
C
i
input capacitance
10
pF
C
L
load capacitance
50
pF
Inputs/outputs D0 to D3
t
suCR
set-up time to CASN
note 3
10
ns
t
hCR
hold time from CASN
note 3
0
ns
t
dMR
delay time from MCLK
note 2
25
ns
t
d
delay time from PWRDWN
15
ns
Input/output LTDATA
t
suMR
set-up time to MCLK
note 2
40
ns
t
hMR
hold time from MCLK
note 2
0
ns
t
dMR
delay time from MCLK
note 2
30
ns
t
d
delay time from PWRDWN
15
ns
t
d
delay time from LTEN
15
ns
Inputs/outputs SBCL and SBWS
t
suMR
set-up time to MCLK
note 2
40
ns
t
hMR
hold time from MCLK
note 2
0
ns
t
dSR
delay time from SBMCLK
note 3
40
ns
t
dMR
delay time from MCLK
notes 2 and 5
30
ns
t
d
delay time from PWRDWN
15
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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