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參數(shù)資料
| 型號： | S75PL127JCFBFWB2 |
| 廠商： | Spansion Inc. |
| 英文描述： | Power supply woltage of 2.7 to 3.1 volt |
| 中文描述： | 功率2月7號至三月一日伏的電源woltage |
| 文件頁數(shù)： | 83/183頁 |
| 文件大?。?/td> | 1409K |
| 代理商： | S75PL127JCFBFWB2 |
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84
S29GLxxxN MirrorBit
TM
Flash Family
S29GLxxxN_MCP_A1 December 15, 2004
A d v a n c e I n f o r m a t i o n
Device Bus Operations
This section describes the requirements and use of the device bus operations,
which are initiated through the internal command register. The command register
itself does not occupy any addressable memory location. The register is a latch
used to store the commands, along with the address and data information
needed to execute the command. The contents of the register serve as inputs to
the internal state machine. The state machine outputs dictate the function of the
device.
Table 1
lists the device bus operations, the inputs and control levels they
require, and the resulting output. The following subsections describe each of
these operations in further detail.
Table 1. Device Bus Operations
Legend:
L = Logic Low = V
IL
, H = Logic High = V
IH
, V
ID
= 11.5–12.5 V, V
HH
= 11.5–12.5V, X = Don’t Care, SA = Sector
Address, A
IN
= Address In, D
IN
= Data In, D
OUT
= Data Out
Notes:
1. Addresses are AMax:A0 in word mode. Sector addresses are A
Max
:A16 in both modes.
2. If WP# = V
IL
, the first or last sector group remains protected. If WP# = V
IH
, the first or last sector will be
protected or unprotected as determined by the method described in “Write Protect (WP#)”. All sectors are
unprotected when shipped from the factory (The Secured Silicon Sector may be factory protected depending
on version ordered.)
3. D
IN
or D
OUT
as required by command sequence, data polling, or sector protect algorithm (see
Figure 2
,
Figure 4
, and
Figure 5
).
VersatileIO
TM
(V
IO
) Control
The
VersatileIO
TM
(V
IO
) control allows the host system to set the voltage levels
that the device generates and tolerates on CE# and DQ I/Os to the same voltage
level that is asserted on V
IO
. See Ordering Information for V
IO
options on this
device.
For example, a V
I/O
of 1.65 V to 3.6 V allows for I/O at the 1.8 or 3 volt levels,
driving and receiving signals to and from other 1.8-V or 3-V devices on the same
data bus.
Requirements for Reading Array Data
To read array data from the outputs, the system must drive the CE# and OE#
pins to V
IL
. CE# is the power control and selects the device. OE# is the output
control and gates array data to the output pins. WE# should remain at V
IH
.
The internal state machine is set for reading array data upon device power-up,
or after a hardware reset. This ensures that no spurious alteration of the memory
Operation
CE#
OE#
WE#
RESET#
WP#/
ACC
Addresses
(Note 1)
DQ0–DQ15
Read
L
L
H
H
X
A
IN
D
OUT
Write (Program/Erase)
L
H
L
H
Note 2
A
IN
(Note 3)
Accelerated Program
L
H
L
H
V
HH
A
IN
(Note 3)
Standby
V
CC
±
0.3 V
X
X
V
CC
±
0.3 V
H
X
High-Z
Output Disable
L
H
H
H
X
X
High-Z
Reset
X
X
X
L
X
X
High-Z
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S75PL127JCFBFWB3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Power supply woltage of 2.7 to 3.1 volt |
| S75PL127JCFBFWU0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Power supply woltage of 2.7 to 3.1 volt |
| S75PL127JCFBFWU2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Power supply woltage of 2.7 to 3.1 volt |
| S75PL127JCFBFWU3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Power supply woltage of 2.7 to 3.1 volt |
| S75PL127NBF | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
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