參數(shù)資料
型號(hào)： S71GL064A80BAI0F3
廠商： Spansion Inc.
英文描述： Stacked Multi-Chip Product (MCP) Flash Memory and RAM
中文描述： 堆疊式多芯片產(chǎn)品（MCP）的閃存和RAM
文件頁(yè)數(shù)： 67/102頁(yè)
文件大?。?/td> 1606K
代理商： S71GL064A80BAI0F3
March 31, 2005 S71GL032A_00_A0
S71GL032A Based MCPs
67
A d v a n c e I n f o r m a t i o n
AC Characteristics
Read-Only Operations-S29GL064A only
Notes:
1.
2.
Read-Only Operations-S29GL032A only
Not 100% tested.
See
Figure 11
and
Table 24
for test specifications.
Notes:
1.
2.
Not 100% tested.
See
Figure 11
and
Table 24
for test specifications.
Parameter
Description
Test Setup
Speed Options
Unit
JEDEC
Std.
90
10
11
t
AVAV
t
RC
Read Cycle Time (Note 1)
Min
90
100
110
ns
t
AVQV
t
ACC
Address to Output Delay
CE#, OE# = V
IL
Max
90
100
110
ns
t
ELQV
t
CE
Chip Enable to Output Delay
OE# = V
IL
Max
90
100
110
ns
t
PACC
Page Access Time
Max
25
30
30
ns
t
GLQV
t
OE
Output Enable to Output Delay
Max
25
30
30
ns
t
EHQZ
t
DF
Chip Enable to Output High Z (Note 1)
Max
16
ns
t
GHQZ
t
DF
Output Enable to Output High Z (Note 1)
Max
16
ns
t
AXQX
t
OH
Output Hold Time From Addresses, CE# or OE#, Whichever Occurs
First
Min
0
ns
t
OEH
Output Enable Hold Time
(Note 1)
Read
Toggle and
Data# Polling
Min
0
ns
Min
10
ns
Parameter
Description
Test Setup
Speed Options
Unit
JEDEC
Std.
90
10
11
t
AVAV
t
RC
Read Cycle Time (Note 1)
Min
90
100
110
ns
t
AVQV
t
ACC
Address to Output Delay
CE#, OE# = V
IL
Max
90
100
110
ns
t
ELQV
t
CE
Chip Enable to Output Delay
OE# = V
IL
Max
90
100
110
ns
t
PACC
Page Access Time
Max
25
30
30
ns
t
GLQV
t
OE
Output Enable to Output Delay
Max
25
30
30
ns
t
EHQZ
t
DF
Chip Enable to Output High Z (Note 1)
Max
16
ns
t
GHQZ
t
DF
Output Enable to Output High Z (Note 1)
Max
16
ns
t
AXQX
t
OH
Output Hold Time From Addresses, CE# or OE#,
Whichever Occurs First
Min
0
ns
t
OEH
Output Enable Hold Time (Note 1)
Read
Min
0
ns
Toggle and
Data# Polling
Min
10
ns
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參數(shù)描述
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