參數(shù)資料
型號(hào): S71GL064A08BFW0B0
廠商: SPANSION LLC
元件分類: 存儲(chǔ)器
英文描述: Stacked Multi-Chip Product (MCP) Flash Memory and RAM
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA56
封裝: 7 X 9 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-56
文件頁數(shù): 96/102頁
文件大小: 1606K
代理商: S71GL064A08BFW0B0
96
S71GL032A Based MCPs
S71GL032A_00_A0 March 31, 2005
A d v a n c e I n f o r m a t i o n
AC Operating Conditions
Test Conditions
Test Load and Test Input/Output Reference
Input pulse level: 0.4 to 2.2V
Input rising and falling time: 5ns
Input and output reference voltage: 1.5V
Output load (See Figure 32): CL= 30pF+ 1TTL
Notes:
1.
Including scope and jig capacitance.
2.
R1= 3070
, R2= 3150
.
3.
V
TM
= 2.8V.
AC Characteristics
Read/Write Characteristics (V
CC
=2.7-3.3V)
Figure 32. AC Output Load
Parameter List
Symbol
Speed Bins
Units
70ns
Min
Max
R
Read cycle time
t
RC
70
-
ns
Address access time
t
AA
-
70
ns
Chip select to output
t
CO1
, t
CO2
-
70
ns
Output enable to valid output
t
OE
-
35
ns
LB#, UB# Access Time
t
BA
-
70
ns
Chip select to low-Z output
t
LZ1
, t
LZ2
10
-
ns
LB#, UB# enable to low-Z output
t
BLZ
10
-
ns
Output enable to low-Z output
t
OLZ
5
-
ns
Chip disable to high-Z output
t
HZ1
, t
HZ2
0
25
ns
UB#, LB# disable to high-Z output
t
BHZ
0
25
ns
Output disable to high-Z output
t
OHZ
0
25
ns
Output hold from address change
t
OH
10
-
ns
VTM (note 3)
R1 (note 2)
CL (note 1)
R2 (note 2)
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