參數(shù)資料
型號： S29PL256N70GFWW03
廠商： SPANSION LLC
元件分類： DRAM
英文描述： 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
中文描述： 16M X 16 FLASH 3V PROM, 70 ns, PBGA84
封裝： 8 X 11.60 MM, LEAD FREE, FBGA-84
文件頁數(shù)： 67/74頁
文件大?。?/td> 1968K
代理商： S29PL256N70GFWW03
June 6, 2007 S29PL-N_00_A5
S29PL-N MirrorBit
Flash Family
67
D a t a
S h e e t
( P r e l i m i n a r y )
8. The Reset command is required to return to reading array data (or to the erase-suspend-read mode if previously in Erase Suspend) when a bank is in the
autoselect mode, or if DQ5 goes high (while the bank is providing status information) or performing sector lock/unlock.
9. The fourth cycle of the autoselect command sequence is a read cycle. The system must provide the bank address.
See Autoselect on page 23.
10.Device IDs: PL256N = 223Ch; PL127N = 2220h;
PL129N = 2221h.
11.
See Autoselect on page 23.
12.The Unlock Bypass command sequence is required prior to this command sequence.
13.The Unlock Bypass Reset command is required to return to reading array data when the bank is in the unlock bypass mode.
14.The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode. The Erase Suspend command is
valid only during a sector erase operation, and requires the bank address.
15.The Erase Resume command is valid only during the Erase Suspend mode, and requires the bank address.
16.The total number of cycles in the command sequence is determined by the number of words written to the write buffer. The maximum number of cycles in the
command sequence is 37.
17.Command sequence resets device for next command after write-to-buffer operation.
18.Entry commands are needed to enter a specific mode to enable instructions only available within that mode.
19.The Exit command must be issued to reset the device into read mode. Otherwise the device hangs.
20.The following mode cannot be performed at the same time. Autoselect/CFI/Unlock Bypass/Secured Silicon. Command sequence resets device for next
command after write-to-buffer operation.
21.Command is valid when device is ready to read array data or when device is in autoselect mode. Address equals 55h on all future devices, but 555h for PL256N.
22.Requires Entry command sequence prior to execution. Secured Silicon Sector Exit Reset command is required to exit this mode; device may otherwise be placed
in an unknown state.
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S29PL256N80FAI002 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
S29PL256N80FAI003 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
S29PL256N80FAIW00 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
S29PL256N80FAIW02 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
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