參數(shù)資料
型號: S29GL064M90FAIR13
廠商: SPANSION LLC
元件分類: DRAM
英文描述: 3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology
中文描述: 4M X 16 FLASH 3V PROM, 90 ns, PBGA64
封裝: 13 X 11 MM, FORTIFIED, BGA-64
文件頁數(shù): 102/160頁
文件大小: 2142K
代理商: S29GL064M90FAIR13
102
S29GLxxxM MirrorBit
TM
Flash Family
S29GLxxxM_00A5 April 30, 2004
P r e l i m i n a r y
All addresses are latched on the falling edge of WE# or CE#, whichever happens
later. All data is latched on the rising edge of WE# or CE#, whichever happens
first. Refer to the AC Characteristics section for timing diagrams.
Reading Array Data
The device is automatically set to reading array data after device power-up. No
commands are required to retrieve data. The device is ready to read array data
after completing an Embedded Program or Embedded Erase algorithm.
After the device accepts an Erase Suspend command, the device enters the
erase-suspend-read mode, after which the system can read data from any non-
erase-suspended sector. After completing a programming operation in the Erase
Suspend mode, the system may once again read array data with the same ex-
ception. See the Erase Suspend/Erase Resume Commands section for more
information.
The system
must
issue the reset command to return the device to the read (or
erase-suspend-read) mode if DQ5 goes high during an active program or erase
operation, or if the device is in the autoselect mode. See the next section, Reset
Command, for more information.
See also Requirements for Reading Array Data in the Device Bus Operations sec-
tion for more information. The Read-Only Operations–“AC Characteristics”
section on page 124 provides the read parameters, and Figure 13 shows the tim-
ing diagram.
Reset Command
Writing the reset command resets the device to the read or erase-suspend-read
mode. Address bits are don’t cares for this command.
The reset command may be written between the sequence cycles in an erase
command sequence before erasing begins. This resets the device to the read
mode. Once erasure begins, however, the device ignores reset commands until
the operation is complete.
The reset command may be written between the sequence cycles in a program
command sequence before programming begins. This resets the device to the
read mode. If the program command sequence is written while the device is in
the Erase Suspend mode, writing the reset command returns the device to the
erase-suspend-read mode. Once programming begins, however, the device ig-
nores reset commands until the operation is complete.
The reset command may be written between the sequence cycles in an autoselect
command sequence. Once in the autoselect mode, the reset command must be
written to return to the read mode. If the device entered the autoselect mode
while in the Erase Suspend mode, writing the reset command returns the device
to the erase-suspend-read mode.
If DQ5 goes high during a program or erase operation, writing the reset command
returns the device to the read mode (or erase-suspend-read mode if the device
was in Erase Suspend).
Note that if DQ1 goes high during a Write Buffer Programming operation, the sys-
tem must write the Write-to-Buffer-Abort Reset command sequence to reset the
device for the next operation.
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S29GL064M90FAIR20 3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology
S29GL064M90FAIR22 3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology
S29GL064M90FAIR23 MOSFET, Switching; VDSS (V): 250; ID (A): 65; Pch : 150; RDS (ON) typ. (ohm) @10V: 0.029; RDS (ON) typ. (ohm) @4V[4.5V]: -; RDS (ON) typ. (ohm) @2.5V: -; Ciss (pF) typ: 4900; toff (µs) typ: 0.22; Package: TO-3P
S29GL064M90FAIR30 3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology
S29GL064M90FAIR32 MOSFET, Switching; VDSS (V): 250; ID (A): 12; Pch : 35; RDS (ON) typ. (ohm) @10V: 0.13; RDS (ON) typ. (ohm) @4V[4.5V]: -; RDS (ON) typ. (ohm) @2.5V: -; Ciss (pF) typ: 1300; toff (µs) typ: 0.08; Package: TO-220FN
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