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參數(shù)資料
| 型號(hào)： | S29GL032M10FBCR50 |
| 廠商： | Spansion Inc. |
| 英文描述： | MirrorBit Flash Family |
| 中文描述： | MirrorBit閃存系列 |
| 文件頁數(shù)： | 110/159頁 |
| 文件大?。?/td> | 2217K |
| 代理商： | S29GL032M10FBCR50 |
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110
S29GLxxxM MirrorBit
TM
Flash Family
S29GLxxxM_00_B3 Octorber 18, 2004
D a t a s h e e t
Sector Erase Command Sequence
Sector erase is a six bus cycle operation. The sector erase command sequence is initiated by writing two unlock
cycles, followed by a set-up command. Two additional unlock cycles are written, and are then followed by the
address of the sector to be erased, and the sector erase command.
Table 35 on page 113
and
Table 36 on
page 114
shows the address and data requirements for the sector erase command sequence.
The device does
not
require the system to preprogram prior to erase. The Embedded Erase algorithm automati-
cally programs and verifies the entire memory for an all zero data pattern prior to electrical erase. The system is
not required to provide any controls or timings during these operations.
After the command sequence is written, a sector erase time-out of 50 μs occurs. During the time-out period, ad-
ditional sector addresses and sector erase commands may be written. Loading the sector erase buffer may be
done in any sequence, and the number of sectors may be from one sector to all sectors. The time between these
additional cycles must be less than 50 μs, otherwise erasure may begin. Any sector erase address and command
following the exceeded time-out may or may not be accepted. It is recommended that processor interrupts be
disabled during this time to ensure all commands are accepted. The interrupts can be re-enabled after the last
Sector Erase command is written.
Any command other than Sector Erase or Erase Suspend during the
time-out period resets the device to the read mode.
Note that the SecSi Sector, autoselect, and CFI func-
tions are unavailable when an erase operation is in progress
.
The system must rewrite the command sequence
and any additional addresses and commands.
The system can monitor DQ3 to determine if the sector erase timer has timed out (See the section on DQ3: Sector
Erase Timer.). The time-out begins from the rising edge of the final WE# pulse in the command sequence.
When the Embedded Erase algorithm is complete, the device returns to reading array data and addresses are no
longer latched. The system can determine the status of the erase operation by reading DQ7, DQ6, or DQ2 in the
erasing sector. Refer to the
“Write Operation Status” on page 115
section for information on these status bits.
Once the sector erase operation starts, only the Erase Suspend command is valid. All other commands are ig-
nored. However, note that a
hardware reset
immediately
terminates the erase operation. If that occurs, the
sector erase command sequence should be reinitiated once the device returns to reading array data, to ensure
data integrity.
Figure 6, on page 111
illustrates the algorithm for the erase operation. Refer to the Erase and Program Operations
table in the
“AC Characteristics” on page 124
section for parameters, and
Figure 18, on page 133
for timing
diagrams.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29GL032M10FBCR52 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10FBCR53 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10FBCR60 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10FBCR62 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10FBCR63 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
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